Proceedings ArticleDOI
Physical unclonable functions for device authentication and secret key generation
G. Edward Suh,Srinivas Devadas +1 more
- pp 9-14
TLDR
This work presents PUF designs that exploit inherent delay characteristics of wires and transistors that differ from chip to chip, and describes how PUFs can enable low-cost authentication of individual ICs and generate volatile secret keys for cryptographic operations.Abstract:
Physical Unclonable Functions (PUFs) are innovative circuit primitives that extract secrets from physical characteristics of integrated circuits (ICs). We present PUF designs that exploit inherent delay characteristics of wires and transistors that differ from chip to chip, and describe how PUFs can enable low-cost authentication of individual ICs and generate volatile secret keys for cryptographic operations.read more
Citations
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Journal ArticleDOI
Client-Server Identification Protocols with Quantum PUF
TL;DR: This work proposes two identification protocols based on quantum PUFs that provide provable exponential security against any Quantum Polynomial-Time (QPT) adversary with resource-efficient parties and provides a comprehensive comparison between the two proposed protocols.
Journal ArticleDOI
P-Val: Antifuse-Based Package-Level Defense Against Counterfeit ICs
Abhishek Basak,Swarup Bhunia +1 more
TL;DR: This paper proposes a novel, low-overhead package-level IC integrity validation approach, referred to as P-Val, for unified protection against two primary forms of counterfeiting attacks: recycling and cloning.
Journal ArticleDOI
An Optimality Summary: Secret Key Agreement with Physical Unclonable Functions
Onur Günlü,Rafael F. Schaefer +1 more
TL;DR: In this article, the authors address security and privacy problems for digital devices and biometrics from an information-theoretic optimality perspective to conduct authentication, message encryption/decryption, identification or secure and private computations by using a secret key.
Proceedings ArticleDOI
SEPUFSoC: Using PUFs for Memory Integrity and Authentication in Multi-Processors System-on-Chip
TL;DR: The proposed SEPUFSoC (Secure PUF-based SoC), a novel flexible, secure, and fast architecture able to be integrated into any MPSoC, prevents execution of unauthorized code as well as data manipulation by ensuring memory integrity and authentication.
Patent
A non-linear physically unclonable function (puf) circuit with machine-learning attack resistance
TL;DR: A physically unclonable function (PUF) circuit may include an array of PUF cells to generate respective response bits of an authentication code in response to a challenge bit string.
References
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Journal ArticleDOI
Physical one-way functions
TL;DR: The concept of fabrication complexity is introduced as a way of quantifying the difficulty of materially cloning physical systems with arbitrary internal states as primitives for physical analogs of cryptosystems.
Proceedings ArticleDOI
Silicon physical random functions
TL;DR: It is argued that a complex integrated circuit can be viewed as a silicon PUF and a technique to identify and authenticate individual integrated circuits (ICs) is described.
Tamper resistance: a cautionary note
Ross Anderson,Markus G. Kuhn +1 more
TL;DR: It is concluded that trusting tamper resistance is problematic; smartcards are broken routinely, and even a device that was described by a government signals agency as 'the most secure processor generally available' turns out to be vulnerable.
Journal ArticleDOI
Extracting secret keys from integrated circuits
TL;DR: It is shown that arbiter-based PUFs are realizable and well suited to build key-cards that need to be resistant to physical attacks and to be identified securely and reliably over a practical range of environmental variations such as temperature and power supply voltage.
Journal ArticleDOI
Impact of die-to-die and within-die parameter fluctuations on the maximum clock frequency distribution for gigascale integration
TL;DR: In this paper, a model describing the maximum clock frequency distribution of a microprocessor is derived and compared with wafer sort data for a recent 0.25-/spl mu/m microprocessor.