Proceedings ArticleDOI
Physical unclonable functions for device authentication and secret key generation
G. Edward Suh,Srinivas Devadas +1 more
- pp 9-14
TLDR
This work presents PUF designs that exploit inherent delay characteristics of wires and transistors that differ from chip to chip, and describes how PUFs can enable low-cost authentication of individual ICs and generate volatile secret keys for cryptographic operations.Abstract:
Physical Unclonable Functions (PUFs) are innovative circuit primitives that extract secrets from physical characteristics of integrated circuits (ICs). We present PUF designs that exploit inherent delay characteristics of wires and transistors that differ from chip to chip, and describe how PUFs can enable low-cost authentication of individual ICs and generate volatile secret keys for cryptographic operations.read more
Citations
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Proceedings ArticleDOI
On Design of Temperature Invariant Physically Unclonable Functions Based on Ring Oscillators
TL;DR: This paper exploits the negative temperature resistance property of n+ and p+ polysilicon placed as source feedback resistors to de-sensitize ring oscillators to temperature variations and proposes a temperature-invariant ring oscillator PUF architecture based on Serial-Input Serial-Output (SISO) topology.
Proceedings ArticleDOI
Survey of Attacks and Defenses on Edge-Deployed Neural Networks
TL;DR: This work covers the landscape of attacks on, and defenses, of neural networks deployed in edge devices and provides a taxonomy of attacks and defenses targeting edge DNNs.
Journal ArticleDOI
Contemporary CMOS aging mitigation techniques: Survey, taxonomy, and methods
Navid Khoshavi,Rizwan A. Ashraf,Ronald F. DeMara,Saman Kiamehr,Fabian Oboril,Mehdi B. Tahoori +5 more
TL;DR: A comprehensive survey and taxonomy of techniques used to model, monitor and mitigate Bias Temperature Instability effects in logic circuits are presented to foster new inspiring techniques for this important reliability phenomenon leading to advancements in the design of defect-tolerant digital circuits.
Book ChapterDOI
Fuzzy Password-Authenticated Key Exchange
Pierre-Alain Dupont,Pierre-Alain Dupont,Julia Hesse,David Pointcheval,Leonid Reyzin,Sophia Yakoubov +5 more
TL;DR: The first efficient and general solutions to this problem that enable, for example, key agreement based on commonly used biometrics such as iris scans are provided.
Journal ArticleDOI
Multiply Constant-Weight Codes and the Reliability of Loop Physically Unclonable Functions
Yeow Meng Chee,Zouha Cherif,Jean-Luc Danger,Sylvain Guilley,Han Mao Kiah,Jon-Lark Kim,Patrick Solé,Xiande Zhang +7 more
TL;DR: The class of multiply constant-weight codes is introduced to improve the reliability of certain physically unclonable function response, and classical coding methods are extended to construct multiply Constant Weight Codes from known \(q\) -ary and constant- weight codes.
References
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Journal ArticleDOI
Physical one-way functions
TL;DR: The concept of fabrication complexity is introduced as a way of quantifying the difficulty of materially cloning physical systems with arbitrary internal states as primitives for physical analogs of cryptosystems.
Proceedings ArticleDOI
Silicon physical random functions
TL;DR: It is argued that a complex integrated circuit can be viewed as a silicon PUF and a technique to identify and authenticate individual integrated circuits (ICs) is described.
Tamper resistance: a cautionary note
Ross Anderson,Markus G. Kuhn +1 more
TL;DR: It is concluded that trusting tamper resistance is problematic; smartcards are broken routinely, and even a device that was described by a government signals agency as 'the most secure processor generally available' turns out to be vulnerable.
Journal ArticleDOI
Extracting secret keys from integrated circuits
TL;DR: It is shown that arbiter-based PUFs are realizable and well suited to build key-cards that need to be resistant to physical attacks and to be identified securely and reliably over a practical range of environmental variations such as temperature and power supply voltage.
Journal ArticleDOI
Impact of die-to-die and within-die parameter fluctuations on the maximum clock frequency distribution for gigascale integration
TL;DR: In this paper, a model describing the maximum clock frequency distribution of a microprocessor is derived and compared with wafer sort data for a recent 0.25-/spl mu/m microprocessor.