scispace - formally typeset
Proceedings ArticleDOI

Physical unclonable functions for device authentication and secret key generation

TLDR
This work presents PUF designs that exploit inherent delay characteristics of wires and transistors that differ from chip to chip, and describes how PUFs can enable low-cost authentication of individual ICs and generate volatile secret keys for cryptographic operations.
Abstract
Physical Unclonable Functions (PUFs) are innovative circuit primitives that extract secrets from physical characteristics of integrated circuits (ICs). We present PUF designs that exploit inherent delay characteristics of wires and transistors that differ from chip to chip, and describe how PUFs can enable low-cost authentication of individual ICs and generate volatile secret keys for cryptographic operations.

read more

Content maybe subject to copyright    Report

Citations
More filters
Journal ArticleDOI

SecuCode: Intrinsic PUF Entangled Secu re Wireless Code Dissemination for Computational RFID Devices

TL;DR: This work presents, for the first time, a secure wireless code dissemination (SecuCode) mechanism for CRFIDs by entangling a device intrinsic hardware security primitive—Static Random Access Memory Physical Unclonable Function (SRAM PUF)—to a firmware update protocol.
Posted Content

A Survey on Hardware-based Security Mechanisms for Internet of Things.

TL;DR: This survey paper presents a review of several security challenges of emerging IoT networks and discusses some of the attacks and their countermeasures based on different domains in IoT networks.
Journal ArticleDOI

On Enhancing Reliability of Weak PUFs via Intelligent Post-Silicon Accelerated Aging

TL;DR: A low-cost proxy is proposed to measure the degree of process variation of each device at birth and use previously proposed device aging models to determine the burn-in requirements, showing that this procedure reduces cumulative burn- in cost without compromising the resultant reliability of weak PUFs.
Journal ArticleDOI

Memristors for Secret Sharing-Based Lightweight Authentication

TL;DR: This work demonstrates how secure and lightweight user authentication techniques can be designed using several well-known properties of memristive devices, and lays out the required hardware design and discusses the potential attacks to these protocols and the corresponding countermeasures.
Book ChapterDOI

On Physical Obfuscation of Cryptographic Algorithms

TL;DR: A solution for physically obfuscating the representation of a cipher, to augment chips resistance against physical threats, by combining ideas from masking techniques and Physical Obfuscated Keys (POKs) is described.
References
More filters
Journal ArticleDOI

Physical one-way functions

TL;DR: The concept of fabrication complexity is introduced as a way of quantifying the difficulty of materially cloning physical systems with arbitrary internal states as primitives for physical analogs of cryptosystems.
Proceedings ArticleDOI

Silicon physical random functions

TL;DR: It is argued that a complex integrated circuit can be viewed as a silicon PUF and a technique to identify and authenticate individual integrated circuits (ICs) is described.

Tamper resistance: a cautionary note

TL;DR: It is concluded that trusting tamper resistance is problematic; smartcards are broken routinely, and even a device that was described by a government signals agency as 'the most secure processor generally available' turns out to be vulnerable.
Journal ArticleDOI

Extracting secret keys from integrated circuits

TL;DR: It is shown that arbiter-based PUFs are realizable and well suited to build key-cards that need to be resistant to physical attacks and to be identified securely and reliably over a practical range of environmental variations such as temperature and power supply voltage.
Journal ArticleDOI

Impact of die-to-die and within-die parameter fluctuations on the maximum clock frequency distribution for gigascale integration

TL;DR: In this paper, a model describing the maximum clock frequency distribution of a microprocessor is derived and compared with wafer sort data for a recent 0.25-/spl mu/m microprocessor.
Related Papers (5)