Proceedings ArticleDOI
Physical unclonable functions for device authentication and secret key generation
G. Edward Suh,Srinivas Devadas +1 more
- pp 9-14
TLDR
This work presents PUF designs that exploit inherent delay characteristics of wires and transistors that differ from chip to chip, and describes how PUFs can enable low-cost authentication of individual ICs and generate volatile secret keys for cryptographic operations.Abstract:
Physical Unclonable Functions (PUFs) are innovative circuit primitives that extract secrets from physical characteristics of integrated circuits (ICs). We present PUF designs that exploit inherent delay characteristics of wires and transistors that differ from chip to chip, and describe how PUFs can enable low-cost authentication of individual ICs and generate volatile secret keys for cryptographic operations.read more
Citations
More filters
Journal ArticleDOI
Hardware Assisted Buffer Protection Mechanisms for Embedded RISC-V
TL;DR: A physically unclonable function (PUF)-based randomized canary generation technique is employed that removes the need to store the sensitive canary words in memory or CPU registers, thereby being more secure, while incurring low overheads.
Journal ArticleDOI
Implementation of Physical Unclonable Functions using hetero junction based GAA TFET
TL;DR: GAA structure of large range of III-V and IV semiconductors for physically doped TFET has been analysed in order to find most suitable alternative for CMOS in circuit level designing and the impact of random variations on basic device and inverter characteristics of electrically dominant Ge/GaAs based GAA TFET is investigated first time.
Proceedings ArticleDOI
FPGA based delay PUF implementation for security applications
TL;DR: A new type of authentication of a device or chip called Physically Unclonable functions (PUFs) is developed such that, with the built-in manufacturing differences, it provides security.
Posted Content
Authenticated Secret Key Generation in Delay Constrained Wireless Systems.
TL;DR: This paper proposes a zero round trip time (0-RTT) resumption authentication protocol combining PUF and SKG processes, a novel authenticated encryption (AE) using SKG, and pipelining of the AE SKG and the encrypted data transfer in order to reduce latency.
Proceedings ArticleDOI
A temperature-independent PUF with a configurable duty cycle of CMOS ring oscillators
TL;DR: The number of ring oscillators needed to build a robust PUF is decreased thanks to the addition of multiple and uncorrelated variables but with negligible area overhead.
References
More filters
Journal ArticleDOI
Physical one-way functions
TL;DR: The concept of fabrication complexity is introduced as a way of quantifying the difficulty of materially cloning physical systems with arbitrary internal states as primitives for physical analogs of cryptosystems.
Proceedings ArticleDOI
Silicon physical random functions
TL;DR: It is argued that a complex integrated circuit can be viewed as a silicon PUF and a technique to identify and authenticate individual integrated circuits (ICs) is described.
Tamper resistance: a cautionary note
Ross Anderson,Markus G. Kuhn +1 more
TL;DR: It is concluded that trusting tamper resistance is problematic; smartcards are broken routinely, and even a device that was described by a government signals agency as 'the most secure processor generally available' turns out to be vulnerable.
Journal ArticleDOI
Extracting secret keys from integrated circuits
TL;DR: It is shown that arbiter-based PUFs are realizable and well suited to build key-cards that need to be resistant to physical attacks and to be identified securely and reliably over a practical range of environmental variations such as temperature and power supply voltage.
Journal ArticleDOI
Impact of die-to-die and within-die parameter fluctuations on the maximum clock frequency distribution for gigascale integration
TL;DR: In this paper, a model describing the maximum clock frequency distribution of a microprocessor is derived and compared with wafer sort data for a recent 0.25-/spl mu/m microprocessor.