Proceedings ArticleDOI
Physical unclonable functions for device authentication and secret key generation
G. Edward Suh,Srinivas Devadas +1 more
- pp 9-14
TLDR
This work presents PUF designs that exploit inherent delay characteristics of wires and transistors that differ from chip to chip, and describes how PUFs can enable low-cost authentication of individual ICs and generate volatile secret keys for cryptographic operations.Abstract:
Physical Unclonable Functions (PUFs) are innovative circuit primitives that extract secrets from physical characteristics of integrated circuits (ICs). We present PUF designs that exploit inherent delay characteristics of wires and transistors that differ from chip to chip, and describe how PUFs can enable low-cost authentication of individual ICs and generate volatile secret keys for cryptographic operations.read more
Citations
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Journal ArticleDOI
Generation of the Secret Encryption Key Using the Signature of the Embedded System
TL;DR: A secret encryption key generation algorithm by using the signature of the embedded system is developed and the qualitative characteristic of the generated keys - the entropy is explored.
Proceedings ArticleDOI
Circuit design of physical unclonable function for security applications in standard CMOS technology
Duhyun Jeon,Byong-Deok Choi +1 more
TL;DR: The experiments show that the YIA- PUF shows no bit error throughout 1,000 times repeated measurement for 96 hours at 125 °C, and the VIA-PUF, one of the physical-based PUFs, can generate the random responses if the via hole size is properly chosen smaller than regulated by the design rule.
Book ChapterDOI
Identities for Embedded Systems Enabled by Physical Unclonable Functions
TL;DR: It is shown that PUFs face hardware as well as modeling attacks, and specific analyses and hardening has to be performed, in order to establish PUFs as a reliable security primitive for embedded systems.
Proceedings ArticleDOI
Guard-NoC: A Protection Against Side-Channel Attacks for MPSoCs
Cezar Reinbrecht,Abdullah Aljuffri,Said Hamdioui,Mottaqiallah Taouil,Bruno Forlin,Johanna Sepulveda +5 more
TL;DR: Guard-NoC is presented, a secure Network-on-Chip (NoC) architecture able to protect MPSoCs against a wide variety of LSCAs and leaks almost no information while having a minimal area and power overhead.
Proceedings ArticleDOI
Wallet Based E-Cash System for Secured Multi-hop Cash Exchange
Heinz Kreft,Wael Adi +1 more
TL;DR: This research is a peer to peer (P2P) electronic cash transfer equivalent to a physical cash transfer in public use and is a multi-purpose inter-operable digital cash payment scheme for domestic usage.
References
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Journal ArticleDOI
Physical one-way functions
TL;DR: The concept of fabrication complexity is introduced as a way of quantifying the difficulty of materially cloning physical systems with arbitrary internal states as primitives for physical analogs of cryptosystems.
Proceedings ArticleDOI
Silicon physical random functions
TL;DR: It is argued that a complex integrated circuit can be viewed as a silicon PUF and a technique to identify and authenticate individual integrated circuits (ICs) is described.
Tamper resistance: a cautionary note
Ross Anderson,Markus G. Kuhn +1 more
TL;DR: It is concluded that trusting tamper resistance is problematic; smartcards are broken routinely, and even a device that was described by a government signals agency as 'the most secure processor generally available' turns out to be vulnerable.
Journal ArticleDOI
Extracting secret keys from integrated circuits
TL;DR: It is shown that arbiter-based PUFs are realizable and well suited to build key-cards that need to be resistant to physical attacks and to be identified securely and reliably over a practical range of environmental variations such as temperature and power supply voltage.
Journal ArticleDOI
Impact of die-to-die and within-die parameter fluctuations on the maximum clock frequency distribution for gigascale integration
TL;DR: In this paper, a model describing the maximum clock frequency distribution of a microprocessor is derived and compared with wafer sort data for a recent 0.25-/spl mu/m microprocessor.