Journal ArticleDOI
Short-Channel Effects in Tunnel FETs
Jianzhi Wu,Jie Min,Yuan Taur +2 more
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TLDR
In this article, the authors investigated short-channel effects in double-gate tunnel FETs using an analytic model that includes depletion in the source and showed that the drain bias has a significant effect on the potential profile at the source when the channel length is reduced to below twice the scale length.Abstract:
This paper investigates short-channel effects (SCEs) in double-gate tunnel FETs (TFETs) using an analytic model that includes depletion in the source. It is shown that the drain bias has a significant effect on the potential profile at the source when the channel length is reduced to below twice the scale length. The OFF-state current becomes a strong function of channel length. The subthreshold current slope is also degraded in short-channel TFETs to the extent that there is no region of <60 mV/decade below a minimum channel length. The SCE also manifests itself in the finite-output conductance in the saturation region—a Drain-Induced Barrier Lowering-like effect in conventional MOSFETs.read more
Citations
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Posted ContentDOI
Design and Performance Enhancement of Gate-on-Source PNPN Doping–Less Vertical Nanowire TFET
TL;DR: In this paper, a Doping-Less Vertical Nanowire Tunnel Field Effect Transistor (DLVNWTFET) with a p-n-p-n structure is proposed.
Journal ArticleDOI
Effects of Linearity and Reliability Analysis for HGO-DW-SCTFET with Temperature Variation for High Frequency Application
TL;DR: In this article, the effects of temperature variation on Hetero Gate Oxide Dual Work Function Step Channel Tunnel Field Effect Transistor (HGO-DW-SCTFET) were examined.
Journal ArticleDOI
Simulation study of short-channel effects of tunnel field-effect transistors
Koichi Fukuda,Hidehiro Asai,Junichi Hattori,Takahiro Mori,Yukinori Morita,Wataru Mizubayashi,Meishoku Masahara,Shinji Migita,Hiroyuki Ota,Kazuhiro Endo,Takashi Matsukawa +10 more
TL;DR: In this article, the authors investigated the short-channel effects of tunnel field effect transistors (FETs) using simulations of a nonlocal band-to-band tunneling model.
Proceedings ArticleDOI
Design of 3D cylindrical GAA-TFET based on germanium source with drain underlap for low power applications
TL;DR: In this article, a cylindrical GAA TFET based on germanium source was proposed for low power applications. But the proposed device used the merits of low band gap material, which is used as a material in the source region, and it showed the better device performance to address the requirement of ultra-low power applications, which corresponds to 7 × improvement in I ON /I OFF ratio when compared with the Si-GAA-TFET.
Journal ArticleDOI
Methodology to Investigate Impact of Grain Orientation on Threshold Voltage and Current Variability in Tunneling Field-Effect Transistors
TL;DR: It is confirmed that the WFV of the gate parts causes the current variation in areas where tunneling is varied mainly according to the gate bias.
References
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Journal ArticleDOI
Low-Voltage Tunnel Transistors for Beyond CMOS Logic
Alan Seabaugh,Qin Zhang +1 more
TL;DR: This review introduces and summarizes progress in the development of the tunnel field- effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges.
Book
Fundamentals of carrier transport
TL;DR: The fundamental principles of carrier transport in semiconductors and semiconductor devices are discussed in this article, which is an accessible introduction to the behavior of charged carriers in semiconductor and semiconductor devices.
Journal ArticleDOI
A continuous, analytic drain-current model for DG MOSFETs
TL;DR: In this article, a continuous analytic currentvoltage model for double-gate MOSFETs is presented, which is derived from closed-form solutions of Poisson's equation, and current continuity equation without the charge-sheet approximation.
Journal ArticleDOI
Performance Comparison Between p-i-n Tunneling Transistors and Conventional MOSFETs
TL;DR: In this paper, a detailed performance comparison between conventional n-i-n MOSFET transistors and tunneling field effect transistors (TFETs) is presented, using semiconducting carbon nanotubes as the model channel material.
Journal ArticleDOI
Analytic description of short-channel effects in fully-depleted double-gate and cylindrical, surrounding-gate MOSFETs
TL;DR: In this paper, a simple but powerful evanescent-mode analysis showed that the length /spl lambda/ over which the source and drain perturb the channel potential, is 1/spl pi/ of the effective device thickness in the double-gate case, and 1/4.810 of the cylindrical case, in excellent agreement with PADRE device simulations.