Institution
Teradyne
Company•Boston, Massachusetts, United States•
About: Teradyne is a company organization based out in Boston, Massachusetts, United States. It is known for research contribution in the topics: Signal & Automatic test equipment. The organization has 828 authors who have published 999 publications receiving 15695 citations.
Topics: Signal, Automatic test equipment, Device under test, Printed circuit board, Interface (computing)
Papers published on a yearly basis
Papers
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21 Dec 2007TL;DR: In this article, a shielded cable interface module has cable receiving grooves extending laterally to an edge of the board, each including a center conductor groove, an insulator groove, and a shield groove.
Abstract: A shielded cable interface module having cable receiving grooves extending laterally to an edge of the board, each including a center conductor groove, an insulator groove, and a shield groove. A center conductor via and a shield via extend through the board. A conductor plane on the cable termination side surrounds the cable receiving grooves. The conductor plane includes a non-conductor region within the conductor plane adjacent to each of the conductor center conductor grooves. Ground vias associated with the cable receiving grooves are spaced apart from and partially surround the center conductor via outside and adjacent to the non-conductor region, the ground vias extend through the printed circuit board from the cable termination side to the system interface side.
7 citations
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04 Feb 2015TL;DR: In this article, the first semiconductor device may comprise a plurality of serializer-deserializer interfaces coupled to the second semiconductor devices, and the second device may be clocked from a clock signal derived from the clock circuit.
Abstract: An electronic system, comprising a first semiconductor device, a second semiconductor device, a clock circuit, and a plurality of independently adjustable calibration circuits connected in each of the plurality of serial data paths. The first semiconductor device may comprise a plurality of Serializer-Deserializer interfaces. The second semiconductor device may comprise a plurality of serial data interfaces coupled to the plurality of Serializer-Deserializer interfaces to provide a plurality of serial data paths between the first semiconductor device and the second semiconductor device. The plurality of Serializer-Deserializer interfaces and the plurality of serial data interfaces may be clocked from a clock signal derived from the clock circuit. The plurality of independently adjustable calibration circuits may be configured to compensate for timing differences across the plurality of serial data paths.
7 citations
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24 Apr 2003TL;DR: In this article, a multi-layer PCB with a plurality of stacked dielectric layers, a conductor disposed on at least one of the plurality of layers, and a non-conductive via extending through at least a portion of dielectrics to intersect the conductor is presented.
Abstract: What is provided is a multi-layer PCB having a plurality of stacked dielectric layers, a conductor disposed on at least one of the plurality of dielectric layers, and a non-conductive via extending through at least a portion of the plurality of dielectric layers to intersect the conductor. A conductive body in an activated state is introduced into the non-conductive via, and upon contacting the conductor, the activated state conductive body adheres to the conductor. The activated state conductive body is then effected to a deactivated state, wherein the conductive body is affixed to the conductor to provide an electrical connection thereto.
7 citations
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12 Jan 1995TL;DR: In this paper, an AC test signal is injected onto a line under test at the near end and the received signal is converted to DC, which is sent to the far end.
Abstract: Apparatus and method for testing lines. The apparatus is particularly useful for testing lines in a switched network, such as might be used to electronically route telephone and computer data lines to various offices in an office building. The apparatus includes an AC test source and a DC measurement device located at a near end switch. A DC transform circuit is located at a far end switch. According to the test method, an AC test signal is injected onto a line under test at the near end. At the far end, the received signal is converted to DC, which is sent to the near end. Line attenuation, and hence fault conditions, are detected by comparing the DC signal to the transmitted AC signal. Techniques to increase the signal to noise ratio of the DC signal are also disclosed.
7 citations
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04 Apr 1977TL;DR: In this paper, an improved weighting assembly for holding a circuit board in contact with test pins is presented. But this assembly is not suitable for circuit board testing with a large number of test pins.
Abstract: Circuit board testing apparatus featuring an improved weighting assembly for holding a circuit board in contact with test pins.
7 citations
Authors
Showing all 830 results
Name | H-index | Papers | Citations |
---|---|---|---|
John H. Lienhard | 68 | 419 | 18058 |
Todd Austin | 55 | 167 | 20607 |
Alexander H. Slocum | 44 | 449 | 9393 |
Scott C. Noble | 30 | 98 | 3495 |
D. R. LaFosse | 26 | 139 | 2555 |
Tongdan Jin | 26 | 113 | 2326 |
Thomas S. Cohen | 24 | 37 | 2490 |
Mark W. Gailus | 21 | 54 | 1851 |
R. Ryan Vallance | 20 | 87 | 1081 |
Richard F. Roth | 18 | 37 | 1104 |
Sepehr Kiani | 15 | 28 | 672 |
Frank W. Ciarallo | 14 | 44 | 1066 |
Brian S. Merrow | 14 | 34 | 621 |
Philip T. Stokoe | 13 | 26 | 1238 |
Ernest P. Walker | 12 | 22 | 252 |