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Institution

Teradyne

CompanyBoston, Massachusetts, United States
About: Teradyne is a company organization based out in Boston, Massachusetts, United States. It is known for research contribution in the topics: Signal & Automatic test equipment. The organization has 828 authors who have published 999 publications receiving 15695 citations.


Papers
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Patent
Michael C. Panis1
25 Jan 2008
TL;DR: In this paper, a jitter frequency determining system is provided that includes a comparator, a clock source, a latching circuit, a memory device and a processor, where the comparator is adapted to receive at least one output signal from a device under test and compare the output signal to an expected signal.
Abstract: A jitter frequency determining system is provided that includes a comparator, a clock source, a latching circuit, a memory device and a processor. The comparator is adapted to receive at least one output signal from a device under test and compare the output signal to an expected signal. The output signal has a repeating pattern. The clock source is adapted to produce a sampling clock based on user inputs. The clock source is further adapted to change the time between locally-in-order strobes to adjust the measurement bandwidth. The latching circuit is adapted to obtain samples of the output signal according to the sampling clock. The memory device is adapted to store the sampled data. The processor is adapted to analyze the stored data to determine jitter and to express jitter as a function of frequency.

2 citations

Proceedings ArticleDOI
D.W. Raymond1, D. Haigh1, R. Bodick1, B. Ryan1, D. McCombs1 
02 Oct 1994
TL;DR: Once various obstacles are overcome, board testers can serve as programming stations for in-circuit-writable devices such as FPGAs, microcontrollers, EEPROMs, and flash memories.
Abstract: Once various obstacles are overcome, board testers can serve as programming stations for in-circuit-writable devices such as FPGAs, microcontrollers, EEPROMs, and flash memories. Manufacturing cost and cycle time can be considerably reduced.

2 citations

Patent
19 Nov 2013
TL;DR: In this paper, a test system may include circuitry that reduces the number of edges in each cycle of a test program based on data specifying operation of the tester in that cycle and/or a prior cycle.
Abstract: A semiconductor device-under-test (DUT) may be tested by an automated test system that processes test programs specifying a number of edges per tester cycle that may be greater than the number of edges the tester is capable of generating. The test system may include circuitry that reduces the number of edges in each cycle of a test program based on data specifying operation of the tester in that cycle and/or a prior cycle. Such a reduction simplifies the circuitry required to implement an edge generator by reducing the total number of timing verniers per channel. Nonetheless, flexibility in programming the test system is retained.

2 citations

Proceedings ArticleDOI
D. Rolince1
10 Nov 2003
TL;DR: The details of the test system management environment, the information contained in It, the role of XML in it, and the mechanisms for utilization of the data in maintenance and configuration management reports and TPSs are discussed.
Abstract: Test system resource management is an important aspect of test asset maintenance and configuration control. It is a key requirement in all ATS procurement activities and affects a number of disciplines from TPS developers to calibration and maintenance personal. Teradyne's TestStudio test operating environment software provides a set of services for specifying and viewing test system contents, configuration and connectivity information stored as a series of XML files. XML offers the advantages of enhanced transportability of the data it expresses and the ease of displaying data in electronic (e.g., a web browser) or printed form. This paper discusses the details of the test system management environment, the information contained in it, the role of XML in it, and the mechanisms for utilization of the data in maintenance and configuration management reports and TPSs.

2 citations

Patent
George W. Conner1
17 Feb 2005
TL;DR: In this paper, a channel for use in automatic test equipment and adapted for coupling to a device-under-test is described, which includes a driver and respective AC and DC-coupled signal paths.
Abstract: A channel for use in automatic test equipment and adapted for coupling to a device-under-test is disclosed. The channel includes a driver and respective AC and DC-coupled signal paths. The AC-coupled signal path is disposed at the output of the driver and is configured to propagate signal components at and above a predetermined frequency. The DC-coupled signal path is disposed in parallel with the AC-coupled signal path and is configured to propagate signal components from DC to the predetermined frequency.

2 citations


Authors

Showing all 830 results

NameH-indexPapersCitations
John H. Lienhard6841918058
Todd Austin5516720607
Alexander H. Slocum444499393
Scott C. Noble30983495
D. R. LaFosse261392555
Tongdan Jin261132326
Thomas S. Cohen24372490
Mark W. Gailus21541851
R. Ryan Vallance20871081
Richard F. Roth18371104
Sepehr Kiani1528672
Frank W. Ciarallo14441066
Brian S. Merrow1434621
Philip T. Stokoe13261238
Ernest P. Walker1222252
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20223
20218
202020
201914
201811
201715