Institution
Teradyne
Company•Boston, Massachusetts, United States•
About: Teradyne is a company organization based out in Boston, Massachusetts, United States. It is known for research contribution in the topics: Signal & Automatic test equipment. The organization has 828 authors who have published 999 publications receiving 15695 citations.
Topics: Signal, Automatic test equipment, Device under test, Printed circuit board, Interface (computing)
Papers published on a yearly basis
Papers
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30 Dec 2020TL;DR: In this article, a test system includes a tray to hold devices, where the devices include devices to be tested or devices that have been tested; a motor that is controllable to cause vibrations; and a component that couples the motor to the tray to cause the tray vibrate in response to the vibrations of the motor.
Abstract: An example test system includes a tray to hold devices, where the devices include devices to be tested or devices that have been tested; a motor that is controllable to cause vibrations; and a component that couples the motor to the tray to cause the tray to vibrate in response to the vibrations of the motor.
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01 Sep 2006TL;DR: The software architecture for a complex digital test instrument is described that allows the driver and associated tools to be located with the test executive even though the instrument is resident remotely and controlled by another computer.
Abstract: There is a growing interest among system architects to employ multiple computers. Typically, one central computer runs the test executive and user interface, and other computers control the multiple instrument chassis. This architecture produces complexity regarding the location of the instrument driver and associated development and debugging tools. This paper describes the software architecture for a complex digital test instrument that allows the driver and associated tools to be located with the test executive even though the instrument is resident remotely and controlled by another computer.
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12 Apr 1989TL;DR: The use of simulation data obtained during user development of an application-specific IC (ASIC) to generate a test program is discussed and it is shown that the quality of the test program generated depends on the accuracy of the simulation and the thoroughness of the applied stimuli.
Abstract: The use of simulation data obtained during user development of an application-specific IC (ASIC) to generate a test program is discussed. It is shown that the quality of the test program generated in this way depends on the accuracy of the simulation and the thoroughness of the applied stimuli. The simulation needs to take account of both the tester and the device specifications. The tester imposes certain restraints such as minimum pulse width and restrictions on the relative placing of edges. If the simulator is not truly dynamic, there can be problems with the resulting test program in two key areas. The setup and hold times of the inputs may not be correctly verified, and position of the output may be wrongly predicted. A tester-per-pin architecture has several advantages over a shared-resource tester. These advantages mean saving or shortening of certain steps in the conversion process, easy characterization, and faster response for changes. >
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TL;DR: This article presents an elegant methodology for analyzing different models for ATE operation that ultimately provides a single figure of merit for evaluation and comparison.
Abstract: Designing new automatic test equipment (ATE) frameworks in alignment with the advances in semiconductor technology remains one of the most difficult challenges in the test community. This article presents an elegant methodology for analyzing different models for ATE operation. The methodology ultimately provides a single figure of merit for evaluation and comparison.
Authors
Showing all 830 results
Name | H-index | Papers | Citations |
---|---|---|---|
John H. Lienhard | 68 | 419 | 18058 |
Todd Austin | 55 | 167 | 20607 |
Alexander H. Slocum | 44 | 449 | 9393 |
Scott C. Noble | 30 | 98 | 3495 |
D. R. LaFosse | 26 | 139 | 2555 |
Tongdan Jin | 26 | 113 | 2326 |
Thomas S. Cohen | 24 | 37 | 2490 |
Mark W. Gailus | 21 | 54 | 1851 |
R. Ryan Vallance | 20 | 87 | 1081 |
Richard F. Roth | 18 | 37 | 1104 |
Sepehr Kiani | 15 | 28 | 672 |
Frank W. Ciarallo | 14 | 44 | 1066 |
Brian S. Merrow | 14 | 34 | 621 |
Philip T. Stokoe | 13 | 26 | 1238 |
Ernest P. Walker | 12 | 22 | 252 |