Showing papers on "Breakdown voltage published in 2004"
TL;DR: In this article, a high-voltage high-electron mobility transistors have been fabricated using multiple field plates over dielectric passivation layers, and the device breakdown voltage was found to increase with the addition of the field plates.
Abstract: High-voltage Al/sub 0.22/Ga/sub 0.78/N-GaN high-electron mobility transistors have been fabricated using multiple field plates over dielectric passivation layers. The device breakdown voltage was found to increase with the addition of the field plates. With two field plates, the device showed a breakdown voltage as high as 900 V. This technique is easy to apply, based on the standard planar transistor fabrication, and especially attractive for the power switching applications.
388 citations
TL;DR: In this article, a GaN-based heterojunction field effect transistors were grown by metal-organic chemical vapor deposition on high resistivity 100mm Si (111) substrates.
Abstract: Al/sub 0.26/Ga/sub 0.74/N-GaN heterojunction field-effect transistors were grown by metal-organic chemical vapor deposition on high-resistivity 100-mm Si (111) substrates. Van der Pauw sheet resistance of the two-dimensional electron gas was 300 /spl Omega//square with a standard deviation of 10 /spl Omega//square. Maximum drain current density of /spl sim/1 A/mm was achieved with a three-terminal breakdown voltage of /spl sim/200 V. The cutoff frequency and maximum frequency of oscillation were 18 and 31 GHz, respectively, for 0.7-/spl mu/m gate-length devices. When biased at 50 V, a 2.14-GHz continuous wave power density of 12 W/mm was achieved with associated large-signal gain of 15.3 dB and a power-added efficiency of 52.7%. This is the highest power density ever reported from a GaN-based device grown on a silicon substrate, and is competitive with the best results obtained from conventional device designs on any substrate.
231 citations
TL;DR: In this article, the theoretical limit of a lateral wide band-gap semiconductor (WBS) power device was estimated for SiC, GaN and diamond, and the lateral WBS device realized ultra low on-resistance due to a very short gate-drain offset, and a power integration circuit with very high power can be easily realized even with a small chip.
Abstract: The theoretical limit of a lateral wide band-gap semiconductor (WBS) power device was estimated for SiC, GaN and diamond. The lateral WBS device realizes ultra-low on-resistance due to a very short gate-drain offset, and a power integration circuit with very high power can be easily realized even with a small chip. The lateral WBS devices with breakdown voltage of over 1 kV realized on-resistance below 1 mΩ cm2. For the breakdown voltage of over 10 kV, diamond devices are attractive due to the large critical field (5.6 MV/cm). Although the WBS device realizes drastic reduction of both the chip area and the power loss, the heat dissipation technique and high current density switching capability are also important for bringing out the potential of the WBS device.
152 citations
TL;DR: In this paper, a high-power GaN/AlGaN/GaN high electron mobility transistor (HEMT) has been demonstrated, where a SiO/sub 2/layer was deposited on the drain side of the gate recess in order to reduce gate leakage current and improve breakdown voltage.
Abstract: In this paper, a high-power GaN/AlGaN/GaN high electron mobility transistor (HEMT) has been demonstrated. A thick cap layer has been used to screen surface states and reduce dispersion. A deep gate recess was used to achieve the desired transconductance. A thin SiO/sub 2/ layer was deposited on the drain side of the gate recess in order to reduce gate leakage current and improve breakdown voltage. No surface passivation layer was used. A breakdown voltage of 90 V was achieved. A record output power density of 12 W/mm with an associated power-added efficiency (PAE) of 40.5% was measured at 10 GHz. These results demonstrate the potential of the technique as a controllable and repeatable solution to decrease dispersion and produce power from GaN-based HEMTs without surface passivation.
148 citations
TL;DR: In this paper, the effect of Si3N4 surface passivation on breakdown of AlGaN/GaN high-electron-mobility transistors was studied in detail by investigating dependences of the off-state breakdown voltage on temperature and gate reverse current, and by measuring electroluminescence distribution.
Abstract: The effect of Si3N4 surface passivation on breakdown of AlGaN/GaN high-electron-mobility transistors was studied in detail by investigating dependences of the off-state breakdown voltage on temperature and gate reverse current, and by measuring electroluminescence distribution. Impact ionization in the channel which was triggered by the gate reverse current was responsible for the off-state breakdown. Surface passivation by Si3N4 film was effective to improve the off-state breakdown voltage. This has been explained by a change in the potential distribution due to suppression of electron trapping at the surface states, based on results of electroluminescence measurements.
138 citations
TL;DR: In this article, anisotropy of the impact ionization coefficients of 4H silicon carbide is investigated by means of the avalanche breakdown behavior of p+n diodes on (0001) and (112¯0) 4H carbide epitaxial wafers.
Abstract: Anisotropy of the impact ionization coefficients of 4H silicon carbide is investigated by means of the avalanche breakdown behavior of p+n diodes on (0001) and (112¯0) 4H silicon carbide epitaxial wafers. The impact ionization coefficients are extracted from the avalanche breakdown voltages and the multiplication of a reverse leakage current, due to impact ionization of these p+n diodes. The breakdown voltage of a p+n diode on a (112¯0) wafer is 60% of that on a (0001) wafer, and the extracted impact ionization coefficients of 4H silicon carbide show large anisotropy. We have shown that the anisotropy of the impact ionization coefficients is related to the anisotropy of carrier heating and drift velocity, which are due to the highly anisotropic electronic structure of 4H silicon carbide.
116 citations
TL;DR: In this paper, an enhancement mode MgO/p-GaN metaloxide-semiconductor field effect transistor (MOSFET) utilizing Si+ ion-implanted regions under the source and drain to provide a source of minority carriers for inversion was presented.
Abstract: We report the initial demonstration of an enhancement mode MgO/p-GaN metal-oxide-semiconductor field-effect transistor (MOSFET) utilizing Si+ ion-implanted regions under the source and drain to provide a source of minority carriers for inversion The breakdown voltage for an 80-nm-thick MgO gate dielectric was ∼14 V, corresponding to a breakdown field strength of 175 MV cm−1 and the p-n junction formed between the p-epi and the source had a reverse breakdown voltage >15 V Inversion of the channel was achieved for gate voltages above 6 V The maximum transconductance was 54 μS mm−1 at a drain-source voltage of 5 V, comparable to the initial values reported for GaAs MOSFETs
107 citations
TL;DR: In this paper, the effect of changing secondary emission properties of the electrodes on the breakdown voltage of a capacitively coupled radio frequency argon discharge at 27 MHz was investigated using one-dimensional electrostatic PIC code.
Abstract: Breakdown voltages of a capacitively coupled radio frequency argon discharge at 27 MHz are studied. We use a one-dimensional electrostatic PIC code to investigate the effect of changing the secondary emission properties of the electrodes on the breakdown voltage, particularly at low pd values. Simulation results are compared with the available experimental results and a satisfactory agreement is found.
100 citations
Patent•
15 Jan 2004
TL;DR: In this article, a photoelectric conversion film and a scanning means are connected via a current fusing means which is fused with the preset current to obtain a higher magnifying factor without using high breakdown voltage pixel transistors.
Abstract: PROBLEM TO BE SOLVED: To provide technology for attaining a higher magnifying factor without use of high breakdown voltage pixel transistors. SOLUTION: The solid state imaging apparatus comprises a photoelectric conversion film for generating and accumulating signal charges depending on an incident light and a scanning means for controlling read operation of signal charges accumulated in the photoelectric conversion film. In the solid state imaging apparatus, the photoelectric conversion film and scanning means are connected via a current fusing means which is fused with the preset current. COPYRIGHT: (C)2004,JPO
94 citations
TL;DR: In this article, the authors demonstrate that increasing the current rate from 20 to 150 µA/ns changes the wire core from a solid to a cluster-like state, and demonstrate the effect of current rate on energy deposition.
Abstract: This paper presents direct experimental proof of a significant increase of energy deposition into a metal core before voltage breakdown with the current rate for nanosecond exploding wires in a vacuum. This effect is demonstrated for nine different refractory and nonrefractory metals. The strongest influence of current rate was demonstrated for tungsten wires. Increasing the current rate from 20 to 150 A/ns changes the wire core from a solid to a cluster-like state. For nonrefractory metals such as Ag, Al, Cu, and Au, fast explosion allows deposition inside a metal core 1.5–2.9 times the atomization enthalpy before voltage breakdown. The slow explosion, with 20 A/ns, gives 2–3 times less energy deposition before voltage breakdown than the fast-explosion mode. The current-rate effect is important for optimization of wire ablation, reduction of the mass left behind in the wire-array load, and final x-ray yield in modern multi-MA wire-array Z-pinch facilities.
89 citations
TL;DR: In this article, the electrical characteristics of Zn0.9Mg0.1O∕ZnOp-n junctions grown by pulsed-laser deposition on bulk, single-crystal ZnO substrates are reported.
Abstract: The electrical characteristics of Zn0.9Mg0.1O∕ZnOp–n junctions grown by pulsed-laser deposition on bulk, single-crystal ZnO substrates are reported. The forward turn-on voltage of the junctions was in the range 3.6–4V for Pt∕Au metallization used for the p-Ohmic contact on Zn0.9Mg0.1O.The reverse breakdown voltage is as high as 9V, but displays a small negative temperature coefficient of −0.1–0.2VK−1 over the range 30–200°C. The achievement of acceptable rectification in the junctions required growth of an n-type ZnO buffer on the ZnO substrate prior to growth of the p-type, phosphorus-doped Zn0.9mg0.1O.Without this buffer, the junctions showed very high leakage current.
TL;DR: In this paper, particle-in-cell and Monte Carlo simulations of ion generation processes in atmospheric air are simulated using a Monte Carlo method with emphasis on predicting ion generation and breakdown characteristics in microscale gaps.
Abstract: Understanding of ion generation in air provides insights to several applications, such as gas sensors, electrohydrodynamic pumping, and air purification. In this paper, ion generation processes in atmospheric air are simulated using a particle-in-cell and Monte Carlo method with emphasis on the prediction of ion generation and breakdown characteristics in microscale gaps. The simulation results are validated through comparison to Townsend’s discharge theory and experiments. The significance of each relevant electron-molecule reaction is characterized to improve understanding of ion generation dynamics. Self-sustaining discharge and ionization are predicted under sufficient voltage bias, and the predicted trends of breakdown voltage are similar to those obtained from Paschen’s curve. Corrections to Paschen’s curve in microscale gaps also are identified and compare well to experiments. Electron field emission produces stable electron current that suggests a controllable ionization device without external electron injection sources.
TL;DR: In this article, closed-form analytical limits from first-principle on the specific on-resistance, versus breakdown voltage with mobility compensation for all the currently known high-voltage device topologies: vertical DMOS, RESURF, super-junction, and thin-film silicon-on-insulator.
Abstract: This paper establishes for the first time closed-form analytical limits from first-principle on the specific on-resistance, versus breakdown voltage with mobility compensation for all the currently known high-voltage device topologies: vertical DMOS, RESURF, super-junction, and thin-film silicon-on-insulator. The rigorous analytic treatment results in equations purely based on materials constants (relative dielectric constant), well-established fitting parameters (mobility, ionization coefficient), and natural constants (elementary charge, dielectric constant). The results are equally applicable to high-voltage diodes, bipolar devices and junction-FET, but the emphasis is on DMOS structures, which are the device of choice in many applications. Conduction-modulation devices (SCR, TRIAC, IGBT) are not considered here, as the inherent forward diode voltage renders those devices nonlinear at low anode-cathode voltage, making the term "on-resistance (Ron)" meaningless. The theory has been extended by many degrading mechanisms and real-life limitations and excellent agreement with reported results was obtained.
TL;DR: In this article, an undoped AlGaN-GaN power high electron mobility transistors (HEMTs) on sapphire substrate with 470-V breakdown voltage were fabricated and demonstrated as a main switching device for a high-voltage dc-dc converter.
Abstract: Undoped AlGaN-GaN power high electron mobility transistors (HEMTs) on sapphire substrate with 470-V breakdown voltage were fabricated and demonstrated as a main switching device for a high-voltage dc-dc converter. The fabricated power HEMT realized a high breakdown voltage with a field plate structure and a low on-state resistance of 3.9 m/spl Omega//spl middot/cm/sup 2/, which is 10 /spl times/ lower than that of conventional Si MOSFETs. The dc-dc converter operation of a down chopper circuit was demonstrated using the fabricated device at the input voltage of 300 V. These results show the promising possibilities of the AlGaN-GaN power HEMTs on sapphire substrate for future switching power devices.
TL;DR: In this paper, a simple 1-dimensional analytical solution method for analyzing and determining the breakdown properties of reduced surface field (RESURF) lateral devices is presented, which demonstrates quantitatively and qualitatively the reshaping and reduction of the electric field and its dependence on the device/process key parameters.
Abstract: A simple one-dimensional (1-D) analytical solution method for analyzing and determining the breakdown properties of reduced surface field (RESURF) lateral devices is presented. The solution demonstrates quantitatively and qualitatively the reshaping and reduction of the electric field and its dependence on the device/process key parameters. The solution is based on a simple and physical charge-sharing approach that takes into account the modulation of the lateral depletion layer spreading caused by the vertical depletion extension, and therefore transforms the inherent two-dimensional effects into a simple 1-D equivalent. It also provides a reasonable insight on the breakdown voltage sensitivity of lateral RESURF devices to key device/process parameters that other researchers failed to provide. Using the technique, device designers can set and choose the optimal processing window of the device's critical layers to yield high breakdown voltages. The results obtained using the proposed solution method agree well with the experimental and simulation results.
TL;DR: In this article, the authors demonstrated AlGaN/GaN heterostructure field effect transistors (HFETs) grown on 2 inch Si (111) substrates by metalorganic chemical vapor phase epitaxy (MOVPE).
Abstract: We demonstrated AlGaN/GaN heterostructure field-effect transistors (HFETs) grown on 2 inch Si (111) substrates by metalorganic chemical vapor phase epitaxy (MOVPE). Using GaN/AlN multilayers, we successfully fabricated nonpitted and crack-free GaN films thicker than 1 µm on Si substrates. An electron mobility of 1200 cm2/Vs, a sheet carrier density of 4.5 ×1012 /cm2, and a sheet resistance of 1100 Ω/sq were obtained. Fabricated 60-mm-gate-width HFETs exhibited a maximum drain current of more than 10 A, an on-state resistance of 0.5 Ω, and a breakdown voltage of more than 350 V.
TL;DR: In this paper, the effect of the thermal boundary resistance between the GaN layer and the substrate on the currentvoltage characteristics of GaN MESFETs was investigated.
Abstract: The authors investigate the effect of the thermal boundary resistance between the GaN layer and the substrate on the current–voltage characteristics of GaN MESFETs. Using material specific models for carrier drift-diffusion and thermal conductivity the authors determine the dependence of the breakdown voltage on thermal boundary resistance. The mechanism of the thermal breakdown in GaN transistors is also discussed. Obtained results can be used for structure optimisation of GaN-based transistors.
TL;DR: In this paper, a GaN/GaN power high electron mobility transistors (HEMTs) with a breakdown voltage of 600 V were fabricated and demonstrated as switching power devices for motor drive and power supply applications.
Abstract: AlGaN/GaN power high electron mobility transistors (HEMTs) with a breakdown voltage of 600 V are fabricated and demonstrated as switching power devices for motor drive and power supply applications. A high breakdown voltage was realized in the fabricated power-HEMT by the field plate technique and an ultra low on-state resistance of 3.3 mΩcm2, which is 20 times lower than the silicon limit, due to the high critical field of the GaN material and the high mobility in a two-dimensional electron gas channel. A device with the double-field plate structure was also designed using two-dimensional device simulation to increase the breakdown voltage without any increase of the GaN layer thickness.
TL;DR: In this paper, a composite gate structure consisting of a 0.35 /spl mu/m long silicon nitride window with a metal-insulator-semiconductor (MIS) gate extension toward the drain was presented.
Abstract: The microwave performance of AlGaN/GaN HEMTs at large drain bias is reported. The device structures were grown by organometallic vapor phase epitaxy on SiC substrates with a channel sheet resistance less than 280 ohms/square. The breakdown voltage of the HEMT was improved by the composite gate structure consisting of a 0.35 /spl mu/m long silicon nitride window with a 0.18 /spl mu/m long metal overhang on either side. This produced an metal-insulator-semiconductor (MIS) gate extension toward the drain with the insulator, silicon nitride, approximately 40-nm-thick. Transistors with a 150 /spl mu/m total gate width have demonstrated a continuous wave (CW) 10 GHz output power density and power added efficiency of 16.5 W/mm and 47%, respectively when operated at 60 V drain bias. Small-signal measurements yielded an f/sub T/ and f/sub max/ of 25.7 GHz and 48.8 GHz respectively. Maximum drain current was 1.3 A/mm at +4 V on the gate, with a knee voltage of /spl sim/5 V. This brief demonstrates that AlGaN/GaN HEMTs with an optimized gate structure can extend the device operation to higher drain biases yielding higher power levels and efficiencies than have previously been observed.
01 Dec 2004
TL;DR: In this article, a high power AlGaN/GaN HFET fabricated on a conductive Si substrate with a source-via-grounding (SVG) structure is presented.
Abstract: We present a high power AlGaN/GaN HFET fabricated on a conductive Si substrate with a source-via grounding (SVG) structure. The device has a very low specific on-state resistance of 1.9 m/spl Omega//spl middot/cm/sup 2/ and a high off-state breakdown voltage of 350 V, and a current handling capability of 150 A. In addition, a sub-nano second switching t/sub r/ of 98 psec and t/sub f/ of 96 psec, with a current density as high as 2.0 kA/cm/sup 2/ is demonstrated for the first time.
TL;DR: In this article, the breakdown voltage for argon with tin oxide electrodes was measured for three different electrode distances (0.01 cm, 0.025 cm and 0.05 cm) and for pressure between 1.3 kPa and 13.3kPa.
Abstract: A micro-plasma device is used as a gas sensor. The micro-plasma device produces dc discharges with a parallel-plane electrode configuration. In this paper the breakdown voltage is measured for argon with tin oxide electrodes, for three different electrode distances (0.01 cm, 0.025 cm and 0.05 cm) and for pressure between 1.3 kPa and 13.3 kPa. The effective secondary electron emission coefficient is then determined from breakdown voltage results; its behaviour is analysed and compared with other experimental results. Differences between experimental breakdown voltage and a widely accepted analytical form of the breakdown law are also shown and the influence of the secondary electron emission coefficient is underlined.
01 Sep 2004
TL;DR: In this paper, the authors report the results relative to the design and fabrication of Single Photon Avalanche Detectors (SPAD) operating at low voltage in planar technology, which consist of pn junctions that are able to remain quiescent above the breakdown voltage until a photon is absorbed in the depletion volume.
Abstract: In this paper we report the results relative to the design and fabrication of Single Photon Avalanche Detectors (SPAD) operating at low voltage in planar technology. These silicon sensors consist of pn junctions that are able to remain quiescent above the breakdown voltage until a photon is absorbed in the depletion volume. This event is detected through an avalanche current pulse.
Device design and critical issues in the technology are discussed.
Experimental test procedures are then described for dark-counting rate, afterpulsing probability, photon timing resolution, quantum detection efficiency. Through these experimental setups we have measured the electrical and optical performances of different SPAD technology generations. The results from these measurements indicate that in order to obtain low-noise detectors it is necessary to introduce a local gettering process and to realize the diode cathode through in situ doped polysilicon deposition. With such technology low noise detectors with dark counting rates at room temperature down to 10c/s for devices with 10mm diameter, down to 1kc/s for 50mm diameter have been obtained.
Noticeable results have been obtained also as far as time jitter and quantum detection efficiency are concerned.
This technology is suitable for monolithic integration of SPAD detectors and associated circuits. Small arrays have already been designed and fabricated. Preliminary results indicate that good dark count rate uniformity over the different array pixels has already been obtained.
TL;DR: In this paper, self-aligned indium-phosphide double-heterojunction bipolar transistor devices with cutoff frequency (f/sub /spl tau//) and maximum oscillation frequency ( f/sub max/) over 300 GHz and open-base breakdown voltage (BV/sub ceo/) over 4 V were reported.
Abstract: We report self-aligned indium-phosphide double-heterojunction bipolar transistor devices in a new manufacturable technology with both cutoff frequency (f/sub /spl tau//) and maximum oscillation frequency (f/sub max/) over 300 GHz and open-base breakdown voltage (BV/sub ceo/) over 4 V. Logic circuits fabricated using these devices in a production integrated-circuit process achieved a current-mode logic ring-oscillator gate delay of 1.95 ps and an emitter-coupled logic static-divider frequency of 152 GHz, both of which closely matched model-based circuit simulations.
TL;DR: In this article, the output characteristics accuracy and breakdown voltage performance for very-thin film (80 nm) SOI lateral double-diffused MOS (LDMOS) transistor as a function of the drift doping, drift length and field plate length were investigated.
Abstract: In this paper, we extensively investigate, by two-dimensional simulations, the output characteristics accuracy and breakdown voltage performance for very-thin film (80 nm) SOI lateral double-diffused MOS (LDMOS) transistor as a function of the drift doping, drift length and field plate length. Trade-offs are discussed to optimize the off-state breakdown voltage versus the occurrence of kink effect and quasi-saturation in on-state. The conclusions are supported by experimental results. (C) 2004 Elsevier Ltd. All rights reserved.
TL;DR: In this article, the authors used wet thermally oxidized InAlP as the gate insulator for GaAs MOSFETs and measured leakage current density of 1.39/spl times/10/sup -7/mA/m/sup 2/ at 1 V bias.
Abstract: GaAs metal-oxide-semiconductor field-effect transistors (MOSFETs) using wet thermally oxidized InAlP as the gate insulator are reported for the first time. Leakage current measurements show that the 11-nm-thick native oxide grown from an In/sub 0.49/Al/sub 0.51/P layer lattice-matched to GaAs has good insulating properties, with a measured leakage current density of 1.39/spl times/10/sup -7/ mA//spl mu/m/sup 2/ at 1 V bias. GaAs MOSFETs with InAlP native gate oxide have been fabricated with gate lengths from 7 to 2 /spl mu/m. Devices with 2-/spl mu/m-long gates exhibit a peak extrinsic transconductance of 24.2 mS/mm, an intrinsic transconductance of 63.8 mS/mm, a threshold voltage of 0.15 V, and an off-state gate-drain breakdown voltage of 21.2 V. Numerical Poisson's equation solutions provide close agreement with the measured sheet resistance and threshold voltage.
Patent•
25 Nov 2004
TL;DR: In this article, the authors presented an object to provide a semiconductor device that is equipped with a high breakdown voltage transistor and a low voltage transistor to ensure the element isolation performance in the both transistor forming regions.
Abstract: The present invention has an object to provide a semiconductor device that is equipped with a high breakdown voltage transistor of a high junction breakdown voltage characteristic and a low voltage transistor of a high electric current drive characteristic to thereby ensure the element isolation performance in the both transistor forming regions. The semiconductor device is equipped with a high breakdown voltage transistor (a) and low voltage transistor (b) the widths of whose side walls are different from each other. The side walls of the high breakdown voltage transistor (a) each consist of four layers of first side wall film, second side wall film, third side wall film, and fourth side wall film that are formed in such a way that they are laminated from both side surfaces of a gate electrode in directions that are sidewardly remote away from this gate electrode. The side walls of the low voltage transistor (b) each consist of three layers of the first side wall film, the second side wall film, and the fourth side wall film that are formed in such a way that they are laminated from both side surfaces of a gate electrode in directions that are sidewardly remote away from this gate electrode.
TL;DR: In this paper, the authors investigated high power characteristics of GaN/InGaN double heterojunction bipolar transistors (HBTs) on SiC substrates, showing that nitride HBTs are promising for high power electronic devices in terms of both the material and device structure.
Abstract: High-power characteristics have been investigated for GaN/InGaN double heterojunction bipolar transistors (HBTs) on SiC substrates. A base-collector diode showed a high breakdown voltage exceeding 50 V, which is ascribed to a wide band gap of a GaN collector. The maximum collector current is proportional to the emitter size in the emitter-size ranging from 1.5×10−5 to 1.4×10−4 cm2. The corresponding maximum collector current density is as high as 6.7 kA/cm2, indicating the high current density characteristics of bipolar transistors. A 50 μm×30 μm device operated up to a collector–emitter voltage of 50 V and a collector current of 80 mA in its common-emitter current–voltage characteristics at room temperature. The corresponding power density is as high as 270 kW/cm2, showing that nitride HBTs are promising for high-power electronic devices in terms of both the material and the device structure.
TL;DR: In this paper, highvoltage lateral diffused metal-oxide semiconductor (LDMOS) transistors with a variation in the lateral doping (VLD) of drift regions are demonstrated in junction isolation technology using a fully implanted CDMOS process.
Abstract: High-voltage lateral diffused metal-oxide semiconductor (LDMOS) transistors with a variation in the lateral doping (VLD) of drift regions are demonstrated in junction isolation technology using a fully implanted CDMOS process. The VLD profile is realized by using an analytical approach reported previously. The analytical model is verified through simulations and experiment. Results indicate that higher breakdown voltages can be achieved for a given drift length using a VLD profile in comparison to uniform doping while offering a good tradeoff between breakdown voltage and specific on-resistance.
TL;DR: In this article, the authors reviewed the literature dealing with off-state gate-drain breakdown in MESFET and HEMT structures, with particular emphasis on GaAs PHEMTs, in terms of the physics of the breakdown phenomenon; the breakdown walkout effect; the impact of design and process choices on the breakdown behavior; and the experimental techniques used for breakdown characterization.
Abstract: This paper reviews the literature dealing with off-state gate-drain breakdown in MESFET and HEMT structures, with particular emphasis on GaAs PHEMTs, in terms of: 1) the physics of the breakdown phenomenon; 2) the breakdown walkout effect; 3) the impact of design and process choices on the breakdown behavior; and 4) the experimental techniques used for breakdown characterization. A thorough temperature-dependent breakdown characterization of commercial PHEMTs is also shown and discussed. It is found that different physical mechanisms may dominate the gate-drain leakage depending on the reverse bias and temperature range considered, and the particular PHEMT technology. The main results shown here tell us the following. 1) The breakdown voltages are decreasing functions of temperature between room temperature and 160/spl deg/C. 2) Between room temperature and 90-100/spl deg/C, thermionic-field emission seems be dominant, with low activation energies below 0.15 eV; as a consequence, the temperature dependence of the breakdown voltage is weak. 3) Between 110/spl deg/C and 160/spl deg/C, higher activation energy mechanisms (possibly trap-assisted tunneling and thermionic emission over a field-dependent barrier) tend to dominate, and the temperature dependence of the breakdown voltages is stronger.
TL;DR: The physical processes following the electrical breakdown of water between planar and hemispherical electrodes separated by a sub-millimeter gap have been studied using electrical and optical diagnostics.
Abstract: The physical processes following the electrical breakdown of water between planar and hemispherical electrodes separated by a sub-millimeter gap have been studied using electrical and optical diagnostics. The expanding plasma column after breakdown generates first shockwaves and at a later stage a vapor bubble which expands for about 200 /spl mu/s and then decays with a time constant of I ms. The bubble decay time determines the dielectric recovery of the switch as has been shown with pulse-probe experiments.