Qualcomm

About: Qualcomm is a company organization based out in Farnborough, United Kingdom. It is known for research contribution in the topics: Wireless & Signal. The organization has 19408 authors who have published 38405 publications receiving 804693 citations. The organization is also known as: Qualcomm Incorporated & Qualcomm, Inc..

Lytro camera technology: theory, algorithms, performance analysis

Abstract: The Lytro camera is the first implementation of a plenoptic camera for the consumer market. We consider it a successful example of the miniaturization aided by the increase in computational power characterizing mobile computational photography. The plenoptic camera approach to radiance capture uses a microlens array as an imaging system focused on the focal plane of the main camera lens. This paper analyzes the performance of Lytro camera from a system level perspective, considering the Lytro camera as a black box, and uses our interpretation of Lytro image data saved by the camera. We present our findings based on our interpretation of Lytro camera file structure, image calibration and image rendering; in this context, artifacts and final image resolution are discussed.

Maxwell Construction: The Hidden Bridge between Iterative and Maximum a Posteriori Decoding

Abstract: There is a fundamental relationship between belief propagation and maximum a posteriori decoding. A decoding algorithm, which we call the Maxwell decoder, is introduced and provides a constructive description of this relationship. Both, the algorithm itself and the analysis of the new decoder are reminiscent of the Maxwell construction in thermodynamics. This paper investigates in detail the case of transmission over the binary erasure channel, while the extension to general binary memoryless channels is discussed in a companion paper.

FlashLinQ: A synchronous distributed scheduler for peer-to-peer ad hoc networks

Abstract: This paper proposes FlashLinQ - a synchronous peer-to-peer wireless PHY/MAC network architecture for distributed channel allocation. By leveraging the fine-grained parallel channel access of OFDM, FlashLinQ develops an analog energy-level based signaling scheme that enables SIR (Signal to Interference Ratio) based distributed scheduling. This new signaling mechanism and the corresponding allocation algorithms permit efficient channel-aware spatial resource allocation, leading to significant gains over a CSMA/CA system with RTS/CTS. FlashLinQ is a complete system architecture including (i) timing and frequency synchronization derived from cellular spectrum, (ii) peer discovery, (iii) link management, and (iv) channelaware distributed power, data-rate and link scheduling. We implement FlashLinQ over licensed spectrum on a DSP/FPGA platform. In this paper, we present performance results for FlashLinQ using both implementation and simulations.

Interframe video encoding and decoding system

Abstract: A video compression system and method for compressing video data for transmission or storage by reducing the temporal redundancy in the video data is described. A frame of video data is divided into a variable number of blocks of pixel data of varying size, and each block of data is compared to a window of pixel data in a reference frame of pixel data, typically the previous frame. A best matched block of pixel data is selected from the window of pixel data in the reference frame, and a displacement vector is assigned to describe the selected block location in the reference frame relative to the current block of pixel data. The number and size of the blocks of pixel data are permitted to vary, in order to adapt to motion discontinuities in the sequential frames of pixel data. This is to allow prediction blocks of pixel data in the current frame to be smaller in areas of high activity, while maintaining high levels of compression, achieved by using larger prediction blocks, in areas of the frame with low levels of activity. A frame of predicted pixel data is assembled from variable size blocks of prediction data and subtracted from the current frame of pixel data. Only the residual difference, the displacement vectors and an indication of the block sizes used in the prediction are needed for transmission or storage.

Direct digital synthesizer driven phase lock loop frequency synthesizer

Abstract: A frequency synthesizer which uses a direct digital synthesizer (DDS) to drive a phase lock loop The DDS generates a highly accurate periodic signal of a frequency selected from a plurality of reference frequencies A phase lock loop receives the DDS generated reference signal and a divide-by-N signal for generating an output signal at a frequency determined by the divide-by-N signal The frequency resolution of the phase lock loop is N times the reference signal In a second embodiment, the DDS is incorporated within the feedback path of the phase lock loop An input reference frequency signal is provided to the phase lock loop with the DDS clock signal provided as a function of the phase lock loop output frequency The DDS receives an input frequency control signal which determines the DDS step size The synthesizer output frequency is a function of the input reference , the number of bits in the digital word of the frequency control signal and the DDS step size as determined by the frequency control signal Optional dividers may be provided in the feedback path which may further affect the synthesizer output frequency