Journal ArticleDOI
Device scaling limits of Si MOSFETs and their application dependencies
David J. Frank,R.H. Dennard,E. J. Nowak,Paul M. Solomon,Yuan Taur,Hon-Sum Philip Wong +5 more
- Vol. 89, Iss: 3, pp 259-288
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TLDR
The end result is that there is no single end point for scaling, but that instead there are many end points, each optimally adapted to its particular applications.Abstract:
This paper presents the current state of understanding of the factors that limit the continued scaling of Si complementary metal-oxide-semiconductor (CMOS) technology and provides an analysis of the ways in which application-related considerations enter into the determination of these limits. The physical origins of these limits are primarily in the tunneling currents, which leak through the various barriers in a MOS field-effect transistor (MOSFET) when it becomes very small, and in the thermally generated subthreshold currents. The dependence of these leakages on MOSFET geometry and structure is discussed along with design criteria for minimizing short-channel effects and other issues related to scaling. Scaling limits due to these leakage currents arise from application constraints related to power consumption and circuit functionality. We describe how these constraints work out for some of the most important application classes: dynamic random access memory (DRAM), static random access memory (SRAM), low-power portable devices, and moderate and high-performance CMOS logic. As a summary, we provide a table of our estimates of the scaling limits for various applications and device types. The end result is that there is no single end point for scaling, but that instead there are many end points, each optimally adapted to its particular applications.read more
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Proceedings ArticleDOI
3-terminal nanoelectromechanical switching device in insulating liquid media for low voltage operation and reliability improvement
Jeong Oen Lee,Min-Wu Kim,Seung-Deok Ko,Hee-Oh Kang,Woo-Ho Bae,Minho Kang,Kinam Kim,Dong-Eun Yoo,Jun-Bo Yoon +8 more
TL;DR: In this article, a nanoelectromechanical (NEM) switching device was developed with a new technique involving a liquid medium, which reduced operation voltage by about 40% and the number of switching cycles with reliable device performance was improved more than 5-fold.
Journal ArticleDOI
Impact of Thickness on Contact Issues for Pinning Effect in Black Phosphorus Field‐Effect Transistors
Bei Jiang,Xuming Zou,Xuming Zou,Jie Su,Jinghua Liang,Jingli Wang,Huijun Liu,Liping Feng,Changzhong Jiang,Feng Wang,Jun He,Lei Liao,Lei Liao +12 more
Journal ArticleDOI
Steep Subthreshold Swing n- and p-Channel Operation of Bendable Feedback Field-Effect Transistors with p+–i–n+ Nanowires by Dual-Top-Gate Voltage Modulation
TL;DR: This study demonstrates the promising potential of bendable NW FBFETs for use as low-power components in integrated circuits or memory devices.
Journal ArticleDOI
Nanoelectromechanical torsion switch of low operation voltage for nonvolatile memory application
Wenfeng Xiang,Chengkuo Lee +1 more
TL;DR: In this paper, a torsion switch with low driven voltage was designed for high density non-volatile memory application, and the simulated data of pull-in voltage was analyzed.
Book ChapterDOI
Wigner Function Approach
Abstract: The Wigner function formalism has been introduced with an emphasis on basic theoretical aspects, and recently developed numerical approaches and applications for modeling and simulation of the transport of current carriers in electronic structures. Two alternative ways: the historical introduction of the function on top of the operator mechanics, and an independent formulation of the Wigner theory in phase space which then recovers the operator mechanics, demonstrate that the formalism provides an autonomous description of the quantum world.
References
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Journal ArticleDOI
Introduction to Solid State Physics
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High-performance heat sinking for VLSI
TL;DR: In this paper, a water-cooled integral heat sink for silicon integrated circuits has been designed and tested at a power density of 790 W/cm2, with a maximum substrate temperature rise of 71°C above the input water temperature.
Journal ArticleDOI
Design of ion-implanted MOSFET's with very small physical dimensions
TL;DR: This paper considers the design, fabrication, and characterization of very small Mosfet switching devices suitable for digital integrated circuits, using dimensions of the order of 1 /spl mu/.