Showing papers on "Silicon on insulator published in 2004"

A high-speed silicon optical modulator based on a metal–oxide–semiconductor capacitor

Abstract: Silicon has long been the optimal material for electronics, but it is only relatively recently that it has been considered as a material option for photonics1. One of the key limitations for using silicon as a photonic material has been the relatively low speed of silicon optical modulators compared to those fabricated from III–V semiconductor compounds2,3,4,5,6 and/or electro-optic materials such as lithium niobate7,8,9. To date, the fastest silicon-waveguide-based optical modulator that has been demonstrated experimentally has a modulation frequency of only ∼20 MHz (refs 10, 11), although it has been predicted theoretically that a ∼1-GHz modulation frequency might be achievable in some device structures12,13. Here we describe an approach based on a metal–oxide–semiconductor (MOS) capacitor structure embedded in a silicon waveguide that can produce high-speed optical phase modulation: we demonstrate an all-silicon optical modulator with a modulation bandwidth exceeding 1 GHz. As this technology is compatible with conventional complementary MOS (CMOS) processing, monolithic integration of the silicon modulator with advanced electronics on a single silicon substrate becomes possible.

Losses in single-mode silicon-on-insulator strip waveguides and bends.

Abstract: We report the fabrication and accurate measurement of propagation and bending losses in single-mode silicon waveguides with submicron dimensions fabricated on silicon-on-insulator wafers. Owing to the small sidewall surface roughness achieved by processing on a standard 200mm CMOS fabrication line, minimal propagation losses of 3.6+/-0.1dB/cm for the TE polarization were measured at the telecommunications wavelength of 1.5microm. Losses per 90 masculine bend are measured to be 0.086+/-0.005dB for a bending radius of 1microm and as low as 0.013+/-0.005dB for a bend radius of 2microm. These record low numbers can be used as a benchmark for further development of silicon microphotonic components and circuits.

Multiple-gate SOI MOSFETs

Abstract: In an ever increasing need for higher current drive and better short-channel characteristics, silicon-on-insulator MOS transistors are evolving from classical, planar, single-gate devices into three-dimensional devices with multiple gates (double-, triple- or quadruple-gate devices). The evolution and the properties of such devices are described and the emergence of a new class of MOSFETs, called triple-plus (3 + )-gate devices offer a practical solution to the problem of the ultimate, yet manufacturable, silicon MOSFET.

Compact efficient broadband grating coupler for silicon-on-insulator waveguides.

Abstract: We have designed a high-efficiency broadband grating coupler for coupling between silicon-on-insulator (SOI) waveguides and optical fibers. The grating is only 13 µm long and 12 µm wide, and the size of the grooves is optimized numerically. For TE polarization the coupling loss to single-mode fiber is below 1 dB over a 35-nm wavelength range when using SOI with a two-pair bottom reflector. The tolerances to fabrication errors are also calculated.

Silicon Photonics: An Introduction

Abstract: About the Authors.Foreword.Acknowledgements.1. Fundamentals.2. The Basics of Guided Waves.3. Characteristics of Optical Fibres for Communications.4. Silicon-on-Insulator (SOI) Photonics.5. Fabrication of Silicon Waveguide Devices.6. A Selection of Photonic Devices.7. Polarisation-dependent Losses: Issues for Consideration.8. Prospects for Silicon Light-emitting Devices.Index.

Ultrahigh-quality-factor silicon-on-insulator microring resonator

Abstract: The development of ultrahigh-quality-factor Q silicon-on-insulator (SOI) microring resonators based on silicon wire waveguides is presented. An analytical description is derived, illustrating that in addition to low propagation losses the critical coupling condition is essential for optimizing device characteristics. Propagation losses as low as 1.9±0.1 dB/cm in a curved waveguide with a bending radius of 20 µm and a Q factor as high as 139.000±6.000 are demonstrated. These are believed to be the highest values reported for a curved SOI waveguide device and for any directly structured semiconductor microring fabricated without additional melting-induced surface smoothing.

Basic structures for photonic integrated circuits in silicon-on-insulator

Abstract: For the compact integration of photonic circuits, wavelength-scale structures with a high index contrast are a key requirement. We developed a fabrication process for these nanophotonic structures in Silicon-on-insulator using CMOS processing techniques based on deep UV lithography. We have fabricated both photonic wires and photonic crystal waveguides and show that, with the same fabrication technique, photonic wires have much less propagation loss than photonic crystal waveguides. Measurements show losses of 0.24dB/mm for photonic wires, and 7.5dB/mm for photonic crystal waveguides. To tackle the coupling to fiber, we studied and fabricated vertical fiber couplers with coupling efficiencies of over 21%. In addition, we demonstrate integrated compact spot-size converters with a mode-to-mode coupling efficiency of over 70%.

Raman amplification in ultrasmall silicon-on-insulator wire waveguides

Abstract: We measure stimulated Raman gain at 1550 nm in an ultrasmall SOI strip waveguide, cross-section of 0.098 µm2. We obtain signal amplification of up to 0.7 dB in the counter-propagating configuration for a sample length of 4.2 mm and using a diode pump at 1435 nm with powers of <30 mW. The Raman amplifier has a figure-of-merit (FOM) of 57.47 dB/cm/W. This work shows the feasibility of ultrasmall SOI waveguides for the development of SOI-based on-chip optical amplifiers and active photonic integrated circuits.

Role of free carriers from two-photon absorption in Raman amplification in silicon-on-insulator waveguides

Abstract: We show experimentally that free carriers generated by two-photon-absorption in silicon-on-insulator (SOI) waveguides can introduce large losses which limit the usable pump power for Raman amplification at telecommunication wavelengths. The measured pump loss agreed with a theoretical model of the free-carrier absorption arising from two-photon-induced free carrier generation inside the waveguide.

Glass-based soi structures

Abstract: Semiconductor-on-insulator (SOI) structures, including large area SOI structures, are provided which have one or more regions composed of a layer (15) of a substantially single-crystal semiconductor (e.g., doped silicon) attached to a support substrate (20) composed of an oxide glass or an oxide glass-ceramic. The oxide glass or oxide glass-ceramic is preferably transparent and preferably has a strain point of less than 1000°C, a resistivity at 250°C that is less than or equal to 1016 -cm, and contains positive ions (e.g., alkali or alkaline-earth ions) which can move within the glass or glass-ceramic in response to an electric field at elevated temperatures (e.g., 300 - 1000°C). The bond strength between the semiconductor layer (15) and the support substrate (20) is preferably at least 8 joules/meter2. The semiconductor layer (15) can include a hybrid region (16) in which the semiconductor material has reacted with oxygen ions originating from the glass or glass-ceramic. The support substrate (20) preferably includes a depletion region (23) which has a reduced concentration of the mobile positive ions.

All optical switching and continuum generation in silicon waveguides

Abstract: First demonstration of cross phase modulation based interferometric switch is presented in silicon on insulator waveguides. By using Mach-Zehnder interferometric configuration we experimentally demonstrate switching of CW signal ~25 nm away from the pump laser. We present the effect of free carrier accumulation on switching. Additionally, we theoretically analyze the transient effects and degradations due to free carrier absorption, free carrier refraction and two photon absorption effects. Results suggest that at low peak power levels the system is governed by Kerr nonlinearities. As the input power levels increase the free carrier effects becomes dominant. Effect of free carrier generation on continuum generation and power transfer also theoretically analyzed and spectral broadening factor for high input power levels is estimated.

Net optical gain in a low loss silicon-on-insulator waveguide by stimulated Raman scattering

Abstract: We observe for the first time net optical gain in a low loss silicon waveguide in silicon-on-insulator (SOI) based on stimulated Raman scattering with a pulsed pump laser at 1.545 μm. We show that pulsed pumping with a pulse width narrower than the carrier recombination lifetime in SOI significantly reduces the free carrier generation rate due to two-photon absorption (TPA) in silicon. For a 4.8 cm long waveguide with an effective core area of ~1.57 μm2, we obtained a net gain of 2 dB with a pump pulse width of ~17 ns and a peak pump power of ~470 mW inside the waveguide.

Square-extensional mode single-crystal silicon micromechanical resonator for low-phase-noise oscillator applications

Abstract: A micromechanical 13.1-MHz bulk acoustic mode silicon resonator having a high quality factor (Q=130 000) and high maximum drive level (P= 0.12 mW at the hysteresis limit) is demonstrated. The prototype resonator is fabricated of single-crystal silicon by reactive ion etching of a silicon-on-insulator wafer. A demonstration oscillator based on the new resonator shows single-sideband phase noise of -138 dBc/Hz at 1 kHz offset from the carrier.

Transferable device-containing layer for silicon-on-insulator applications

Abstract: A method for forming an integrated circuit on an insulating substrate is described comprising the steps of forming a semiconductor layer on a seed wafer substrate containing an at least partially crystalline porous release layer, processing the semiconductor layer to form a “transferable” device layer containing at least one semiconductor device, and bonding said transferable device layer to a final, insulating substrate before or after separating said device layer from the seed wafer substrate. A second method, for separating a semiconductor layer from a seed wafer substrate, is described wherein an at least partially crystalline porous layer initially connecting the semiconductor layer and seed wafer substrate is split or broken apart by the steps of (i) introducing a fluid including water into the pores of said porous layer, and (ii) expanding said fluid by solidifying or freezing to break apart the porous layer. The at least partially crystalline porous layer may incorporate at least one porous silicon germanium alloy layer alone or in combination with at least one porous Si layer. Also described is an integrated circuit comprising the transfered device layer described above.

Magneto-optical nonreciprocal phase shift in garnet/silicon-on-insulator waveguides

Abstract: We demonstrate the integration of a single-crystal magneto-optical film onto thin silicon-on-insulator (SOI) waveguides by use of direct wafer bonding. Simulations show that the high confinement and asymmetric structure of SOI allows an enhancement of ∼3× over the nonreciprocal phase shift achieved in previous designs; this value is confirmed by our measurements. Our structure will allow compact magneto-optical nonreciprocal devices, such as isolators, integrated on a silicon waveguiding platform.

High-speed silicon-based electro-optic modulator

Abstract: A silicon-based electro-optic modulator is based on forming a gate region of a first conductivity to partially overly a body region of a second conductivity type, with a relatively thin dielectric layer interposed between the contiguous portions of the gate and body regions. The modulator may be formed on an SOI platform, with the body region formed in the relatively thin silicon surface layer of the SOI structure and the gate region formed of a relatively thin silicon layer overlying the SOI structure. The doping in the gate and body regions is controlled to form lightly doped regions above and below the dielectric, thus defining the active region of the device. Advantageously, the optical electric field essentially coincides with the free carrier concentration area in this active device region. The application of a modulation signal thus causes the simultaneous accumulation, depletion or inversion of free carriers on both sides of the dielectric at the same time, resulting in high speed operation.

Low voltage silicon controlled rectifier (SCR) for electrostatic discharge (ESD) protection of silicon-on-insulator technologies

Abstract: A silicon-on-insulator (SOI) electrostatic discharge (ESD) protection device that can protect very sensitive thin gate oxides by limiting the power dissipation during the ESD event, which is best achieved by reducing the voltage drop across the active (protection) device during an ESD event. In one embodiment, the invention provides very low triggering and holding voltages. Furthermore, the SOI protection device of the present invention has low impedance and low power dissipation characteristics that reduce voltage build-up, and accordingly, enable designers to fabricate more area efficient protection device

Scalability study on a capacitorless 1T-DRAM: from single-gate PD-SOI to double-gate FinDRAM

Abstract: This paper describes both operation principle and scalability of a capacitor-less 1T-DRAM, and proposes a new concept about extending the use of 1T-DRAM to gate lengths of less than 50 nm. Superior characteristics such as long retention time and large sense margin even for gate lengths around 50 nm can be obtained with a double-gate fully depleted FinFET DRAM. Considering capacity, speed, power, and structural complexity of embedded memory, the capacitor-less 1T-DRAM has the possibility of playing the leading part among other memories.

Lateral interband tunneling transistor in silicon-on-insulator

Abstract: We report on a lateral interband tunneling transistor, where the source and drain form a heavily doped lateral pn junction in a thin Si film on a silicon-on-insulator (SOI) substrate. The transistor action results from the control of the reverse-bias tunneling breakdown under drain bias VD by a gate voltage VG. We observe gate control over tunneling drain current ID at both polarities of VG with negligible gate leakage. Systematic ID(VG,VD) measurements, together with numerical device simulations, show that in first approximation ID depends on the maximum junction electric field Fmax(VG,VD). Excellent performance is hence predicted in devices with more abrupt junctions and thinner SOI films. The device does not have an inversion channel and is not subject to scaling rules of standard Si transistors.

One transistor SOI non-volatile random access memory cell

Abstract: One aspect of the present subject matter relates to a memory cell, or more specifically, to a one-transistor SOI non-volatile memory cell. In various embodiments, the memory cell includes a substrate, a buried insulator layer formed on the substrate, and a transistor formed on the buried insulator layer. The transistor includes a floating body region that includes a charge trapping material. A memory state of the memory cell is determined by trapped charges or neutralized charges in the charge trapping material. The transistor further includes a first diffusion region and a second diffusion region to provide a channel region in the body region between the first diffusion region and the second diffusion region. The transistor further includes a gate insulator layer formed over the channel region, and a gate formed over the gate insulator layer. Other aspects are provided herein.

Strained silicon fin field effect transistor

Abstract: Strained Si surrounding the SiGe embedded body on a SOI (silicon on insulator) substrate forms a novel FinFET. The mobility in the channel is enhanced due to strain of the Si channel. The strained Si FinFET includes a SOI substrate, an SiGe embedded body, a strained Si channel surrounding layer, an oxide layer, a poly Si gate electrode (or metal gate electrode), a source and a drain.

Optical communication components

Abstract: We review and contrast key technologies developed to address the optical components market for communication applications. We first review the component requirements from a network perspective. We then look at different material systems, compare their properties, and describe the functions achieved to date in each of them. The material systems reviewed include silica fiber, silica on silicon, silicon on insulator, silicon oxynitride, sol-gels, polymers, thin-film dielectrics, lithium niobate, indium phosphide, gallium arsenide, magneto-optic materials, and birefringent crystals. We then describe the most commonly used classes of optical device technology and present their pros and cons as well as the functions achieved to date in each of them. The technologies reviewed include passive, actuation, and active technologies. The passive technologies described include fused fibers, dispersion-compensating fiber, beam steering, Bragg gratings, diffraction gratings, holographic elements, thin-film filters, photo...

Efficient Raman amplification in silicon-on-insulator waveguides

Abstract: We describe a silicon-on-insulator waveguide Raman amplifier which achieves a large fiber-to-fiber optical gain of 6.8dB using stimulated Raman scattering in a 1.7-cm-long silicon waveguide. By using picosecond pulse pumping at 1557.4nm wavelength, high net optical gain at the first-order Stokes wavelength of 1694.6nm was measured. The optical loss from two-photon absorption generated free carriers was reduced by using a low pulse duty cycle and picosecond pulse pumping.

Time-resolved study of Raman gain in highly confined silicon-on-insulator waveguides

Abstract: We show time-resolved measurement of Raman gain in Silicon submicron-size planar waveguide using picosecond pump and probe pulses. A net nonlinear gain of 6 dB is obtained in a 7-mm long waveguide with 20.7-W peak pump power. We demonstrate an ultrafast all-optical switch based on the free-carrier dispersion effect in the silicon waveguide, whose transmission is enhanced by more than 13 dB due to the Raman effect.

Recent developments and applications of plasma immersion ion implantation

Abstract: Plasma immersion ion implantation (PIII) is an established technique in some niche microelectronics applications, such as synthesis of silicon on insulator. In other applications, such as shallow junction formation by plasma doping, trench doping, and others, PIII possesses unique advantages over conventional techniques. In the last few years, there have been significant breakthroughs in these areas. Recent developments in plasma doping, direct-current plasma immersion ion implantation that excels in planar sample processing, PIII of insulating materials, as well as plasma surface modification of biomaterials are reviewed in this article.

Silicon-on-insulator active pixel sensors

Abstract: Active pixel sensors are defined on double silicon on insulator (SOI) substrates such that a first silicon layer is selected to define radiation detection regions, and a second silicon layer is selected to define readout circuitry. The first and second silicon layers are separated by an insulator layer, typically an oxide layer, and the layers can be independently doped. Doping can be provided in the silicon layers of the SOI substrate during assembly of the SOI substrate, or later during device processing. A semiconductor substrate that supports the first and second layers can be removed for, for example, back side radiation detection, using a second insulator layer (typically an oxide layer) as an etch stop.

Engineering strained silicon on insulator wafers with the Smart CutTM technology

Abstract: Strained silicon on insulator wafers are today envisioned as a natural and powerful enhancement to standard SOI wafers and/or bulk-like strained Si layers. This paper is intended to demonstrate through miscellaneous structural results how a layer transfer technique such as the Smart CutTM technology can be used to obtain good quality tensile-strained silicon on insulator wafers. Such a technique uses preferentially hydrogen implantation to peel-off the very top part of an epitaxial stack and transfer it onto another silicon substrate. The formation of an insulator, prior to the bonding onto a new silicon substrate enables the formation of a “semiconductor on insulator” structure. Two approaches based on the Smart Cut technique are considered in this paper. The first one relies on the formation by layer transfer of a relaxed SiGe on insulator (“SGOI”) substrate on which a tensile-strained Si layer is then grown. The second one is based on the transfer of a SiGe relaxed buffer/Si cap stack. A SiGe-free tensile-silicon on insulator (sSOI) substrate is then obtained after the selective etching of the top SiGe layer. The epitaxial layers studied in this article are of two kinds: (i) the thick, nearly fully relaxed SiGe layers (with or without tensile-strained Si layers on top depending on the final structure targeted: SGOI or sSOI) used as the donor wafers in layer transfer operations, and (ii) the thin, relaxed SiGe layers and the thin, tensile-strained Si epitaxial films grown on SGOI substrates. In-depth physical characterizations of these epitaxial layers are used to evaluate the quality of the transferred layers in terms of thickness uniformity, Ge content, strain control, dislocation densities etc… Detailed experiments are also used to demonstrate that these final substrates are compatible with future CMOS applications. The sSOI approach is particularly challenging in this respect as the strain needs to be maintained during many technological operations such as layer transfer, selective removal of the SiGe, high temperature thermal treatments etc. First results showing how the strain is changing during such operations are presented.

Ultra-thin body super-steep retrograde well (ssrw) fet devices

Abstract: A method of manufacture of a Super Steep Retrograde Well Field Effect Transistor device starts with an SOI layer formed on a substrate, e.g. a buried oxide layer. Thin the SOI layer to form an ultra-thin SOI layer. Form an isolation trench separating the SOI layer into N and P ground plane regions. Dope the N and P ground plane regions formed from the SOI layer with high levels of N-type and P-type dopant. Form semiconductor channel regions above the N and P ground plane regions. Form FET source and drain regions and gate electrode stacks above the channel regions. Optionally form a diffusion retarding layer between the SOI ground plane regions and the channel regions.

A novel low-cost, high-efficiency micromachined silicon solar cell

Abstract: This letter presents a new process for the fabrication of solar cells and modules from single crystal silicon wafers with substantially reduced silicon consumption and processing effort compared to conventional wafer-based cells. The technique of narrow trench etching in an alkaline solution is used to create a series of thin silicon strips extending vertically through the wafer. By turning the silicon strips on their side, a large increase in surface area is achieved. Individual cells fabricated using the new process have reached efficiencies up to 18.5% while a 575 cm/sup 2/ module incorporating a rear reflector and a cell surface coverage of 50% has displayed an efficiency of 12.3% under standard rating conditions. The technique has the potential to reduce silicon consumption by a factor of 10 compared to standard wafer-based silicon solar cells and, therefore, to dramatically reduce the dependence to the expensive silicon feedstock.

Polarization-independent optical racetrack resonators using rib waveguides on silicon-on-insulator

Abstract: In an effort to find low-cost alternatives for components currently used in dense wavelength division multiplexing, optical ring resonators fabricated on silicon on insulator are currently being investigated. Their performance can be further enhanced if they are polarization independent. Herein we use rib waveguides to control the polarization properties of the devices and hence produce polarization-independent racetrack ring resonators. Transverse electric and transverse magnetic resonant peaks are measured to within 2 pm of one another over four cycles of the free spectral range. The racetrack resonators also exhibit measured Q factors of approximately 90 000 and finesse values of 12.