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Journal ArticleDOI

Strained Ge channel p-type metal–oxide–semiconductor field-effect transistors grown on Si1−xGex/Si virtual substrates

TLDR
In this article, a strained Ge channel p-type metal-oxide-semiconductor field effect transistors (p-MOSFETs) were fabricated on Si0.3Ge0.7 virtual substrates.
Abstract
We have fabricated strained Ge channel p-type metal–oxide–semiconductor field-effect transistors (p-MOSFETs) on Si0.3Ge0.7 virtual substrates. The poor interface between silicon dioxide (SiO2) and the Ge channel was eliminated by capping the strained Ge layer with a relaxed, epitaxial silicon surface layer grown at 400 °C. Ge p-MOSFETs fabricated from this structure show a hole mobility enhancement of nearly eight times that of co-processed bulk Si devices, and the Ge MOSFETs have a peak effective mobility of 1160 cm2/V s. These MOSFETs demonstrate the possibility of creating a surface channel enhancement-mode MOSFET with buried channel-like transport characteristics.

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Citations
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Journal ArticleDOI

Strained Si, SiGe, and Ge channels for high-mobility metal-oxide-semiconductor field-effect transistors

TL;DR: A review of the history and current progress in highmobility strained Si, SiGe, and Ge channel metal-oxide-semiconductor field effect transistors (MOSFETs) can be found in this article.
Journal ArticleDOI

Theory of ballistic nanotransistors

TL;DR: In this paper, numerical simulations are used to guide the development of a simple analytical theory for ballistic field-effect transistors, and the model reduces to Natori's theory of the ballistic MOSFET.
Journal ArticleDOI

Academic and industry research progress in germanium nanodevices

Ravi Pillarisetty
- 17 Nov 2011 - 
TL;DR: Germanium-based transistors have the potential to operate at high speeds with low power requirements and might therefore be used in non-silicon-based semiconductor technology in the future.
Journal ArticleDOI

The end of CMOS scaling: toward the introduction of new materials and structural changes to improve MOSFET performance

TL;DR: In this article, the authors focused on scaling CMOS to its fundamental limits, determined by manufacturing, physics, and costs using new materials and nonclassical structures using new non-classical CMOS structures.
References
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Journal ArticleDOI

Band structure, deformation potentials, and carrier mobility in strained Si, Ge, and SiGe alloys

TL;DR: In this article, the authors compute the band structure and shear deformation potentials of strained Si, Ge, and SiGe alloys, and fit the theoretical results to experimental data on the phonon-limited carrier mobilities in bulk Si and Ge.
Journal ArticleDOI

Totally relaxed GexSi1−x layers with low threading dislocation densities grown on Si substrates

TL;DR: In this article, the authors have grown compositionally graded GexSi1−x layers on Si at 900 °C with both molecular beam epitaxy and rapid thermal chemical vapor deposition techniques.
Journal ArticleDOI

Controlling threading dislocation densities in Ge on Si using graded SiGe layers and chemical-mechanical polishing

TL;DR: In this paper, a method of controlling threading dislocation densities in Ge on Si involving graded SiGe layers and chemical-mechanical polishing (CMP) is presented.
Journal ArticleDOI

Relaxed GexSi1−x structures for III–V integration with Si and high mobility two‐dimensional electron gases in Si

TL;DR: In this article, a large lattice constant on Si has been obtained by growing compositionally graded GexSi1−x on Si, and these buffer layers have been characterized with electron-beam-induced current, transmission electron microscopy and x-ray diffraction to determine the extent of relaxation, threading dislocation density, the surface morphology, and the optical properties.
Journal ArticleDOI

Dislocations in strained-layer epitaxy : theory, experiment, and applications

TL;DR: In this paper, an historical perspective of theoretical work and some early experimental work in the field of dislocations in strained-layer epitaxy is presented in a didactic fashion.
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