scispace - formally typeset
Search or ask a question

Showing papers on "Strained silicon published in 2016"


Journal ArticleDOI
TL;DR: In this paper, the authors demonstrate that a thick germanium layer can be transformed from an indirect into a direct band gap semiconductor by using silicon nitride stressor layers and achieve 1.75% (1.67%) biaxial tensile strain in 6 (9) μm diameter microdisks as measured from photoluminescence.
Abstract: Germanium is an ideal candidate to achieve a monolithically integrated laser source on silicon. Unfortunately bulk germanium is an indirect band gap semiconductor. Here, we demonstrate that a thick germanium layer can be transformed from an indirect into a direct band gap semiconductor by using silicon nitride stressor layers. We achieve 1.75% (1.67%) biaxial tensile strain in 6 (9) μm diameter microdisks as measured from photoluminescence. The modeling of the photoluminescence amplitude vs temperature indicates that the zone-center Γ valley has the same energy as the L valley for a 9 μm diameter strained microdisk and is even less for the 6 μm diameter microdisk, thus demonstrating that a direct band gap is indeed obtained. We deduce that the crossover in germanium from indirect to direct gap occurs for a 1.67% ± 0.05% biaxial strain at room temperature, the value of this parameter varying between 1.55% and 2% in the literature.

63 citations


Patent
20 Jul 2016
TL;DR: In this article, a gallium-doped sacrificial epitaxial or polycrystalline germanium layer is formed on a silicon Germanium substrate having a high percentage of germanIUM followed by annealing to diffuse the gallium into the silicon Gernium substrate.
Abstract: A gallium-doped sacrificial epitaxial or polycrystalline germanium layer is formed on a silicon germanium substrate having a high percentage of germanium followed by annealing to diffuse the gallium into the silicon germanium substrate. The germanium layer is selectively removed to expose the surface of a gallium-doped silicon germanium region within the silicon germanium substrate. The process has application to the formation of electrically conductive regions within integrated circuits such as source/drain regions and junctions without the introduction of carbon into such regions.

60 citations


Journal ArticleDOI
TL;DR: This work investigates an alternative rear-passivating contact targeting facile implementation to industrial p-type solar cells, and shows that this intrinsic silicon interlayer is beneficial for surface passivation.
Abstract: The use of passivating contacts compatible with typical homojunction thermal processes is one of the most promising approaches to realizing high-efficiency silicon solar cells. In this work, we investigate an alternative rear-passivating contact targeting facile implementation to industrial p-type solar cells. The contact structure consists of a chemically grown thin silicon oxide layer, which is capped with a boron-doped silicon-rich silicon carbide [SiCx(p)] layer and then annealed at 800–900 °C. Transmission electron microscopy reveals that the thin chemical oxide layer disappears upon thermal annealing up to 900 °C, leading to degraded surface passivation. We interpret this in terms of a chemical reaction between carbon atoms in the SiCx(p) layer and the adjacent chemical oxide layer. To prevent this reaction, an intrinsic silicon interlayer was introduced between the chemical oxide and the SiCx(p) layer. We show that this intrinsic silicon interlayer is beneficial for surface passivation. Optimized p...

58 citations


Journal ArticleDOI
TL;DR: This work has systematically studied the structural stability, absorption spectra, electronic, optical and mechanical properties and minimum thermal conductivity of two novel silicon phases, Cm-32 silicon and P21/m silicon, which are both thermally, dynamically and mechanically stable.
Abstract: Due to its abundance, silicon is the preferred solar-cell material despite the fact that many silicon allotropes have indirect band gaps. Elemental silicon has a large impact on the economy of the modern world and is of fundamental importance in the technological field, particularly in the solar cell industry. Looking for direct band gap silicon is still an important field in material science. Based on density function theory with the ultrasoft pseudopotential scheme in the frame of the local density approximation and the generalized gradient approximation, we have systematically studied the structural stability, absorption spectra, electronic, optical and mechanical properties and minimum thermal conductivity of two novel silicon phases, Cm-32 silicon and P21/m silicon. These are both thermally, dynamically and mechanically stable. The absorption spectra of Cm-32 silicon and P21/m silicon exhibit significant overlap with the solar spectrum and thus, excellent photovoltaic efficiency with great improvements over Fdm Si. These two novel Si structures with direct band gaps could be applied in single p–n junction thin-film solar cells or tandem photovoltaic devices.

47 citations


Journal ArticleDOI
TL;DR: In this article, the authors considered the technology of fabricating clusters of nickel atoms in a silicon crystalline lattice with controlled parameters and established that the content of nickel atom in the lattice makes it possible to considerably expand the spectral sensitivity region of silicon photovoltaic cells to the IR range up to 4 μm.
Abstract: This article considers the technology of fabricating clusters of nickel atoms in a silicon crystalline lattice with controlled parameters. Silicon solar cells with clusters of nickel atoms have been fabricated and their parameters determined. It has been established that the content of nickel atoms in the lattice makes it possible to considerably expand the spectral sensitivity region of silicon photovoltaic cells to the IR range up to 4 μm.

38 citations


Journal ArticleDOI
TL;DR: In this article, a polycrystalline silicon core optical fiber was fabricated by modified thermal annealing of amorphous silicon chemically deposited at high pressure and the resulting fibers have small-diameter cores, a geometry advantageous for optical guidance.
Abstract: Polycrystalline silicon core optical fibers have been fabricated by modified thermal annealing of amorphous silicon chemically deposited at high pressure. The resulting fibers have small-diameter cores, a geometry advantageous for optical guidance. Moreover, the combination of chemical deposition and annealing avoids difficulties associated with undesired transfer of oxygen impurities to the silicon core from the molten cladding during the drawing process. The high aspect ratio of the amorphous silicon core and the presence of the silica cladding surrounding make the design rules for annealing to optimize their polycrystalline structure different from those of conventional amorphous silicon films. We find that optimization of the annealing allows for an increase in the polycrystalline grain size and decrease in the defects in the silicon core. A low optical loss of less than 1 dB/cm at a wavelength of 2.2 μm is thus realized, much lower than that reported for small core size (<10 μm) crystalline silicon f...

34 citations


Proceedings ArticleDOI
01 Dec 2016
TL;DR: In this paper, a planar double-gate ultra-thin-body (DG-UTB), a triple-gate FinFET, and a gate-all-around nanowire (NW) transistor have been designed according to the ITRS specifications for two technology nodes with physical gate lengths of Lg=15 nm and 10.4 nm.
Abstract: Using state-of-the-art simulation tools ranging from semi-classical Monte-Carlo to full-quantum atomistic approaches, the competitiveness of III-V compounds for next-generation high-performance logic switches is confirmed. A planar double-gate ultra-thin-body (DG-UTB), a triple-gate FinFET, and a gate-all-around nanowire (NW) transistor have been designed according to the ITRS specifications for two technology nodes with physical gate lengths of Lg=15 nm and 10.4 nm. A thorough performance comparison of digital and analog figures of merit at these nodes reveals that for Lg=15 nm, the performance of planar and 3-D architectures is comparable. At LG=10.4 nm, the III-V NW promises the highest performance, especially when lowering the supply voltage from 0.59 V to 0.50 V. It also significantly outperforms its strained silicon counterpart. Finally, the effects of series resistance combined with interface traps, surface roughness, alloy scattering, and electron-phonon interactions have been found to deteriorate the III-V ballistic ON-current by 50–60%.

29 citations


Journal ArticleDOI
TL;DR: In this article, conductance and thermoelectric power (TEP) of individual silicon and germanium/silicon core/shell nanowires in the field effect transistor device configuration were simultaneously measured.
Abstract: We have simultaneously measured conductance and thermoelectric power (TEP) of individual silicon and germanium/silicon core/shell nanowires in the field effect transistor device configuration. As the applied gate voltage changes, the TEP shows distinctly different behaviors while the electrical conductance exhibits the turn-off, subthreshold, and saturation regimes, respectively. At room temperature, peak TEP value of ∼300 μV/K is observed in the subthreshold regime of the Si devices. The temperature dependence of the saturated TEP values is used to estimate the carrier doping of Si nanowires.

28 citations


Journal ArticleDOI
TL;DR: In this paper, the authors identify the mechanism behind the severe decrease in the bulk minority-carrier lifetime of silicon after heteroepitaxial growth of gallium phosphide, in a molecular beam epitaxy (MBE) system.

26 citations


Journal ArticleDOI
TL;DR: In this article, a hydrogen plasma-initiated rehydrogenation of intrinsic hydrogenated amorphous silicon (a-Si:H) passivation layers that have been dehydrogenated by annealing is demonstrated.
Abstract: The dehydrogenation of intrinsic hydrogenated amorphous silicon (a-Si:H) at temperatures above approximately 300 °C degrades its ability to passivate silicon wafer surfaces. This limits the temperature of post-passivation processing steps during the fabrication of advanced silicon heterojunction or silicon-based tandem solar cells. We demonstrate that a hydrogen plasma can rehydrogenate intrinsic a-Si:H passivation layers that have been dehydrogenated by annealing. The hydrogen plasma treatment fully restores the effective carrier lifetime to several milliseconds in textured crystalline silicon wafers coated with 8-nm-thick intrinsic a-Si:H layers after annealing at temperatures of up to 450 °C. Plasma-initiated rehydrogenation also translates to complete solar cells: A silicon heterojunction solar cell subjected to annealing at 450 °C (following intrinsic a-Si:H deposition) had an open-circuit voltage of less than 600 mV, but an identical cell that received hydrogen plasma treatment reached a voltage of over 710 mV and an efficiency of over 19%.

23 citations


Journal ArticleDOI
TL;DR: In this article, it was shown that there is a significant increase in the binding energy between the exciton's space-separated electrons and holes (the hole moves across the volume of the quantum dot, and the electron is localized on a spherical surface of a quantum dot-matrix interface) in a nanosystem containing germanium quantum dots grown in a silicon matrix.
Abstract: There is a significant increase in the binding energy between the exciton's space-separated electrons and holes (the hole moves across the volume of the quantum dot, and the electron is localized on a spherical surface of the quantum dot-matrix interface) in a nanosystem containing germanium quantum dots grown in a silicon matrix, in comparison to the binding energy of an exciton in a silicon single crystal. It is established that in such a nanosystem, in the conduction band of the silicon matrix there first exists a band of electron-hole pairs which turns into a band of exciton states located in the band gap of the silicon matrix, as the radius of the quantum dot increases. It is shown that the light absorption mechanisms in such nanosystems are implemented by electron transitions between quantum-levels of the electron-hole pair, as well as electron transitions between the quantum-exciton levels.

Patent
30 Mar 2016
TL;DR: In this paper, a substrate structure with a buried dielectric layer for post-processing silicon handle elimination is described, which provides extremely selective etch stop characteristics with respect to etching chemistries for silicon and silicon oxide.
Abstract: The present disclosure relates to a substrate structure with a buried dielectric layer for post-processing silicon handle elimination. The substrate structure includes a silicon handle layer, a first silicon oxide layer over the silicon handle layer, a buried dielectric layer over the first silicon oxide layer, where the buried dielectric layer is not formed from silicon oxide, a second silicon oxide layer over the buried dielectric layer, and a silicon epitaxy layer over the second silicon oxide layer. The buried dielectric layer provides extremely selective etch stop characteristics with respect to etching chemistries for silicon and silicon oxide.

Journal ArticleDOI
TL;DR: In this article, the sp3 bond-orbital theory is used to describe the strain-induced χ (2) in tetrahedrally coordinated centrosymmetric covalent crystals, like silicon.
Abstract: We develop a theoretical model, relying on the well established sp3 bond-orbital theory, to describe the strain-induced χ (2) in tetrahedrally coordinated centrosymmetric covalent crystals, like silicon. With this approach we are able to describe every component of the χ (2) tensor in terms of a linear combination of strain gradients and only two parameters α and β which can be theoretically estimated. The resulting formula can be applied to the simulation of the strain distribution of a practical strained silicon device, providing an extraordinary tool for optimization of its optical nonlinear effects. The application of the first order theory to the photoelastic effect in C, Si, and Ge showed very good phenomenological and numerical agreement, up to 3% in Si. The model was then used to the second-order nonlinear susceptibility, and we were able not only to confirm the main valid claims known about χ (2) in strained silicon, but also estimate the order of magnitude of the χ (2) generated in that device.

Journal ArticleDOI
TL;DR: In this paper, the photoluminescence (PL) spectra from crystalline silicon (c-Si) wafers passivated by hydrogenated amorphous silicon (a-Si:H) films under various measurement conditions were analyzed.

Journal ArticleDOI
TL;DR: In this paper, the authors demonstrate phonon localization at the tip of silicon nanowires fabricated by galvanic displacement using wet electroless chemical etching of a bulk silicon wafer.
Abstract: The nanoscale engineering of silicon can significantly change its bulk optoelectronic properties to make it more favorable for device integration. Phonon process engineering is one way to enhance inter-band transitions in silicon's indirect band structure alignment. This paper demonstrates phonon localization at the tip of silicon nanowires fabricated by galvanic displacement using wet electroless chemical etching of a bulk silicon wafer. High-resolution Raman micro-spectroscopy reveals that such arrayed structures of silicon nanowires display phonon localization behaviors, which could help their integration into the future generations of nano-engineered silicon nanowire-based devices such as photodetectors and solar cells.

Journal ArticleDOI
TL;DR: In this paper, the impact of band offset asymmetry on the performance of silicon heterojunction solar cells was analyzed and it was shown that wide-bandgap silicon oxide films (of at least several nanometer thin) should be avoided in hole-collecting contacts.
Abstract: Amorphous/crystalline silicon interfaces feature considerably larger valence than conduction band offsets. In this article, we analyze the impact of such band offset asymmetry on the performance of silicon heterojunction solar cells. To this end, we use silicon suboxides as passivation layers—inserted between substrate and (front or rear) contacts—since such layers enable intentionally exacerbated band-offset asymmetry. Investigating all topologically possible passivation layer permutations and focussing on light and dark current-voltage characteristics, we confirm that to avoid fill factor losses, wider-bandgap silicon oxide films (of at least several nanometer thin) should be avoided in hole-collecting contacts. As a consequence, device implementation of such films as window layers—without degraded carrier collection—demands electron collection at the front and hole collection at the rear. Furthermore, at elevated operating temperatures, once possible carrier transport barriers are overcome by thermionic (field) emission, the device performance is mainly dictated by the passivation of its surfaces. In this context, compared to the standard amorphous silicon layers, the wide-bandgap oxide layers applied here passivate remarkably better at these temperatures, which may represent an additional benefit under practical operation conditions.



Journal ArticleDOI
TL;DR: In this article, high-resolution transmission electron microscopy analysis shows a morphologically degraded SiC/Si interface, while mechanical stress measurements indicate considerable relaxation of the interfacial stress.
Abstract: Epitaxial cubic silicon carbide on silicon is of high potential technological relevance for the integration of a wide range of applications and materials with silicon technologies, such as micro electro mechanical systems, wide-bandgap electronics, and graphene. The hetero-epitaxial system engenders mechanical stresses at least up to a GPa, pressures making it extremely challenging to maintain the integrity of the silicon carbide/silicon interface. In this work, we investigate the stability of said interface and we find that high temperature annealing leads to a loss of integrity. High–resolution transmission electron microscopy analysis shows a morphologically degraded SiC/Si interface, while mechanical stress measurements indicate considerable relaxation of the interfacial stress. From an electrical point of view, the diode behaviour of the initial p-Si/n-SiC junction is catastrophically lost due to considerable inter-diffusion of atoms and charges across the interface upon annealing. Temperature dependent transport measurements confirm a severe electrical shorting of the epitaxial silicon carbide to the underlying substrate, indicating vast predominance of the silicon carriers in lateral transport above 25 K. This finding has crucial consequences on the integration of epitaxial silicon carbide on silicon and its potential applications.

Journal ArticleDOI
TL;DR: In this article, a theory based on the nonlinear injection of free carriers inside the waveguide is presented, which is able to account for all the observed anomalies, and the results indicate that the modulation strength is not dependent on waveguide geometry or direction, and that a lot of anomalies are encountered in the device response, which are not compatible with a modulation mechanism of the origin.
Abstract: In the last few years, strained silicon has been proposed as a potential electro-optic material, paving the way to the realization of ultrafast modulators which are compatible with the CMOS fabrication technology. The linear Pockels effect has been used for measuring the magnitude of the induced $\chi ^{(2)}$ components, with values reaching hundreds of $\text{pm/V}$ . Recently, it has been shown that these values could have been overestimated due to the contribution of free carriers to the electro-optic modulation. In this work, this hypothesis is validated by a series of experimental observations, which are performed on strained silicon racetrack resonators. These are fabricated with different waveguide widths and orientations. We use a low frequency (KHz) homodyne detection technique to monitor the electro-optic response of the devices. The results indicate that the modulation strength is not dependent on the waveguide geometry or direction. A lot of anomalies are encountered in the device response, which are not compatible with a modulation mechanism of $\chi ^{(2)}$ origin. To this purporse, a theory based on the nonlinear injection of free carriers inside the waveguide is presented. This is able to account for all the observed anomalies.

Journal ArticleDOI
TL;DR: In this paper, the structure, stability, and electronic properties of silicon-coated carbon nanotubes, silicon rods, and silicon carbide fibers were modeled using density functional theory.
Abstract: With the aim of searching for promising anode materials for lithium-ion batteries, we performed quantum-chemical modeling of the structure, stability, and electronic properties of silicon-coated carbon nanotubes, silicon rods, and silicon carbide fibers by the density functional theory method including gradient correction and periodic boundary conditions. It has been demonstrated that nanotubes poorly hold silicon, whereas silicon firmly adheres to the SiC surface. Silicon rods are more favorable than clusters and have the stability close to that of the crystal. The band gap in the rods is close to zero. Silicon carbide can be transformed into a conductor by doping with nitrogen.

Journal ArticleDOI
TL;DR: In this article, the seed layers for epitaxial silicon growth have been formed by zone-heating recrystallization of double-layer por-Si structures and the influence of annealing parameters on porous silicon structures was studied.
Abstract: Thin-film crystalline silicon is promising for photovoltaic application to reduce the cost of photovoltaic energy Porous silicon structures have been intensively studied as a seed layer for epitaxial growth of thin Si film and layer-transfer process (LTP) In this article, another approach for LTP has been proposed The seed layers for epitaxial silicon growth have been formed by zone-heating recrystallization of double-layer por-Si structures The influence of annealing parameters on porous silicon structures was studied The transformation of por-Si layer to crystalline Si was observed with the formation of smooth continuous surface with the roughness 03 nm, peak-to-valley distance around 35 nm, and reduced density of pores The mechanism of the transformation of por-Si surface due to the action of hydrogen in the passivated pores with preventing surface oxidation was proposed

Journal ArticleDOI
TL;DR: In this article, the authors investigated the impact of reuse sequence on the epitaxial layer quality by carrier lifetime measurements and observed a degradation of the minority carrier lifetime from 15 to 7 µs after 13 reuses.
Abstract: The reuse of the silicon substrate is a key component in the kerfless-porous-silicon-based wafering process. Starting with a boron-doped p+-type substrate, a porous double layer is created, reorganized in a hydrogen bake, and then serves as a substrate for silicon homoepitaxy. After lift-off, the silicon substrate is wet chemically reconditioned and reporosified to serve again as a substrate for epitaxial layer deposition. We reduce the substrate consumption per cycle to 5 ± 0.3 µm/side and demonstrate 14 uses on a 6-in wafer. We investigate the impact of the reuse sequence on the epitaxial layer quality by carrier lifetime measurements. Starting with the third reuse, a pattern becomes visible in lifetime mappings. We observe a degradation of the minority carrier lifetime from 15 to 7 µs after 13 reuses.

Patent
Kangguo Cheng1, Bruce B. Doris1, Ali Khakifirooz1, Darsen D. Lu1, Alexander Reznicek1, Kern Rim1 
22 Aug 2016
TL;DR: In this article, a strained silicon-on-insulator (SSOI) structure is proposed for fabricating a semiconductor device, which consists of, a dielectric layer disposed on a substrate, a silicon germanium layer exposed by the removing, and forming a new gate structure over the portion of the at least one fin in the pFET region.
Abstract: A method for fabricating a semiconductor device, includes providing a strained silicon on insulator (SSOI) structure, the SSOI structure comprises, a dielectric layer disposed on a substrate, a silicon germanium layer disposed on the dielectric layer, and a strained semiconductor material layer disposed directly on the silicon germanium layer, forming a plurality of fins on the SSOI structure, forming a gate structure over a portion of at least one fin in a nFET region, forming a gate structure over a portion of at least one fin in a pFET region, removing the gate structure over the portion of the at least one fin in the pFET region, removing the silicon germanium layer exposed by the removing, and forming a new gate structure over the portion of the at least one fin in the pFET region, such that the new gate structure surrounds the portion on all four sides.

Journal ArticleDOI
TL;DR: In this article, the authors reported on room temperature non-resonant detection of terahertz radiation using strained Silicon MODFETs with nanoscale gate lengths.
Abstract: We report on room temperature non-resonant detection of terahertz radiation using strained Silicon MODFETs with nanoscale gate lengths. The devices were excited at room temperature by an electronic source at 150 and 300 GHz. A maximum intensity of the photoresponse signal was observed around the threshold voltage. Results from numerical simulations based on synopsys TCAD are in agreement with experimental ones. The NEP and Responsivity were calculated from the photoreponse signal obtained experimentally. Those values are competitive with the commercial ones. A maximum of photoresponse was obtained (for all devices) when the polarization of the incident terahertz radiations was in parallel with the fingers of the gate pads. For applications, the device was used as a sensor within a terahertz imaging system and its ability for inspection of hidden objects was demonstrated.

Journal ArticleDOI
TL;DR: The spatially controlled application of electrical current through individual pairs of phosphorus donor electron states in crystalline silicon and silicon dangling bond states at the crystalline Silicon (100) surface is demonstrated using a high‐resolution scanning probe microscope operated under ultra‐high vacuum and at a temperature of 4.3K.
Abstract: Nuclear spins of phosphorus [P] donor atoms in crystalline silicon are among the most coherent qubits found in nature. For their utilization in scalable quantum computers, distinct donor electron wavefunctions must be controlled and probed through electrical coupling by application of either highly localized electric fields or spin-selective currents. Due to the strong modulation of the P-donor wavefunction by the silicon lattice, such electrical coupling requires atomic spatial accuracy. Here, the spatially controlled application of electrical current through individual pairs of phosphorus donor electron states in crystalline silicon and silicon dangling bond states at the crystalline silicon (100) surface is demonstrated using a high‐resolution scanning probe microscope operated under ultra‐high vacuum and at a temperature of 4.3K. The observed pairs of electron states display qualitatively reproducible current-voltage characteristics with a monotonous increase and intermediate current plateaus.

Journal ArticleDOI
TL;DR: In this paper, a combination of hydrogenated nanocrystalline silicon oxide and front side nano-imprint textures was used as anti-reflection layers in silicon heterojunction solar cells.
Abstract: In order to increase the efficiency of high performance silicon heterojunction solar cells even further, it is paramount to increase the photoelectric current by enhancing the amount of light being captured within the absorber. Therefore, to reduce the parasitic absorption in the other layers, optoelectronically favorable hydrogenated nanocrystalline silicon oxide films can substitute the commonly used hydrogenated amorphous silicon layers. In this work, we systematically investigate the combination of hydrogenated nanocrystalline silicon oxide and front side nano-imprint textures as anti-reflection layers in silicon heterojunction solar cells. Ultimately, we were able to tune the parasitic absorption via variation of the front surface field layer and enhance the short-circuit current of the planar solar cells by about 2 mA cm−2 due to a random silicon pyramid textured imprint layer. A maximum active area efficiency of 20.4% was achieved with a short-circuit current of 37.7 mA cm−2.

Journal ArticleDOI
TL;DR: The obtained results show that passivation of dangling bonds with hydrogen atoms leads to substantial transformation of electronic energy structure and the band gap value takes the magnitude which substantially exceeds that for bulk silicon.
Abstract: An investigation of the model of porous silicon in the form of periodic set of silicon nanowires has been carried out. The electronic energy structure was studied using a first-principle band method—the method of pseudopotentials (ultrasoft potentials in the basis of plane waves) and linearized mode of the method of combined pseudopotentials. Due to the use of hybrid exchange-correlation potentials (B3LYP), the quantitative agreement of the calculated value of band gap in the bulk material with experimental data is achieved. The obtained results show that passivation of dangling bonds with hydrogen atoms leads to substantial transformation of electronic energy structure. At complete passivation of the dangling silicon bonds by hydrogen atoms, the band gap value takes the magnitude which substantially exceeds that for bulk silicon. The incomplete passivation gives rise to opposite effect when the band gap value decreases down the semimetallic range.

Journal ArticleDOI
TL;DR: In this article, the authors investigated solar cells with graded band gap hydrogenated amorphous silicon germanium active layer and hydrogenated micro-crystalline silicon buffer layer at the interface of intrinsic and n-type doped layer.

Proceedings ArticleDOI
01 Jun 2016
TL;DR: In this article, the authors report a severe decrease in silicon bulk minority-carrier lifetime after heteroepitaxial growth of gallium phosphide, in their molecular beam epitaxy (MBE) system.
Abstract: A major hindrance to the development of devices integrating III-V materials on silicon is the preservation of its electronic quality. In this contribution, we report on the severe decrease in silicon bulk minority-carrier lifetime after heteroepitaxial growth of gallium phosphide, in our molecular beam epitaxy (MBE) system. The drop in lifetime occurs after annealing silicon above 500°C; we assign the increased recombination rate to extrinsic defect originating from highly mobile impurities diffusing from the MBE chamber. We show that the contaminant can be gettered by phosphorous diffusion. We investigate two approaches to protect the Si bulk lifetime by containing the contaminant to a part of the silicon that can be removed by etching. This provides a path to successful III-V growth on silicon.