Showing papers on "Substrate (electronics) published in 2008"

Vertically aligned single crystal TiO2 nanowire arrays grown directly on transparent conducting oxide coated glass: synthesis details and applications

Abstract: Single-crystal one-dimensional (1D) semiconductor architectures are important in materials-based applications requiring a large surface area, morphological control, and superior charge transport. Titania has widespread utility in applications including photocatalysis, photochromism, photovoltaics, and gas sensors. While considerable efforts have focused on the preparation of 1D TiO2, no methods have been available to grow crystalline nanowire arrays directly onto transparent conducting oxide (TCO) substrates, greatly limiting the performance of TiO2 photoelectrochemical devices. Herein, we present a straightforward low temperature method to prepare single crystal rutile TiO2 nanowire arrays up to 5 microm long on TCO glass via a non-polar solvent/hydrophilic substrate interfacial reaction under mild hydrothermal conditions. The as-prepared densely packed nanowires grow vertically oriented from the TCO glass substrate along the (110) crystal plane with a preferred (001) orientation. In a dye sensitized solar cell, N719 dye, using TiO2 nanowire arrays 2-3 microm long we achieve an AM 1.5 photoconversion efficiency of 5.02%.

Thin film transitor substrate and method of manufacturing the same

Abstract: A method of manufacturing a thin film transistor (“TFT”) substrate includes forming a first conductive pattern group including a gate electrode on a substrate, forming a gate insulating layer on the first conductive pattern group, forming a semiconductor layer and an ohmic contact layer on the gate insulating layer by patterning an amorphous silicon layer and an oxide semiconductor layer, forming a second conductive pattern group including a source electrode and a drain electrode on the ohmic contact layer by patterning a data metal layer, forming a protection layer including a contact hole on the second conductive pattern group, and forming a pixel electrode on the contact hole of the protection layer. The TFT substrate including the ohmic contact layer formed of an oxide semiconductor is further provided.

Thin film transistor and organic light-emitting display device having the thin film transistor

Abstract: Disclosed is a thin film transistor including a P-type semiconductor layer, and an organic light-emitting display device having the thin film transistor. The present invention provides a thin film transistor including a substrate, a semiconductor layer, and a gate electrode and a source/drain electrode formed on the substrate, wherein the semiconductor layer is composed of P-type ZnO:N layers through a reaction of a mono-nitrogen gas with a zinc precursor, and the ZnO:N layer includes an un-reacted impurity element at a content of 3 at % or less.

Raman Studies of Monolayer Graphene: The Substrate Effect

Abstract: Graphene has attracted a lot of interest for fundamental studies as well as for potential applications. Till now, micromechanical cleavage (MC) of graphite has been used to produce high-quality graphene sheets on different substrates. Clear understanding of the substrate effect is important for the potential device fabrication of graphene. Here we report the results of the Raman studies of micromechanically cleaved monolayer graphene on standard SiO2 (300 nm)/Si, single crystal quartz, Si, glass, polydimethylsiloxane (PDMS), and NiFe. Our data suggests that the Raman features of monolayer graphene are independent of the substrate used; in other words, the effect of substrate on the atomic/electronic structures of graphene is negligible for graphene made by MC. On the other hand, epitaxial monolayer graphene (EMG) on SiC substrate is also investigated. Significant blueshift of Raman bands is observed, which is attributed to the interaction of the graphene sheet with the substrate, resulting in the change o...

Preparation of Large-Area Uniform Silicon Nanowires Arrays through Metal-Assisted Chemical Etching

Abstract: A facile fabricating method has been established for large-area uniform silicon nanowires arrays All silicon nanowires obtained were single crystals and epitaxial on the substrate Six kinds of silicon wafers with different types, surface orientations, and doping levels were utilized as starting materials With the catalysis of silver nanoparticles, room-temperature mild chemical etching was conducted in aqueous solution of hydrofluoric acid (HF) and hydrogen peroxide (H2O2) The corresponding silicon nanowires arrays with different morphologies were obtained The silicon nanowires possess the same type and same doping level of the starting wafer All nanowires on the substrate have the same orientation For instance, both (100)- and (111)-oriented p-type wafers produced silicon nanowires in the (100) direction For every kind of silicon wafer, the effect of etching conditions, such as components of etchant, temperature, and time, were systemically investigated This is an appropriate method to produce a

Controlling the Thickness of the Surface Oxide Layer on Cu Nanoparticles for the Fabrication of Conductive Structures by Ink‐Jet Printing

Abstract: With the aim of preparing a high performance conductive ink, we sought to control the surface chemistry of Cu nanoparticles so as to minimize surface oxidation. Specifically, the surface oxide layer on Cu nanoparticles synthesized in ambient atmosphere was minimized by adjusting the molecular weight of poly(N-vinylpyrrolidone) capping molecules, as confirmed by high resolution transmission electron microscopy and X-ray photoelectron spectroscopy analyses. In addition, we demonstrate that by minimizing the thickness of the surface oxide layer, Cu granular films with good conductivity could be obtained by sintering nanoparticle assembles. Finally, we fabricated highly conductive Cu patterns on a plastic substrate by ink-jet printing.

Lithographic apparatus, and device manufacturing method

Abstract: A lithographic apparatus configured to project a patterned beam of radiation onto a target portion of a substrate is disclosed. The apparatus includes a first radiation dose detector and a second radiation dose detector, each detector comprising a secondary electron emission surface configured to receive a radiation flux and to emit secondary electrons due to the receipt of the radiation flux, the first radiation dose detector located upstream with respect to the second radiation dose detector viewed with respect to a direction of radiation transmission, and a meter, connected to each detector, to detect a current or voltage resulting from the secondary electron emission from the respective electron emission surface.

Organic el device

Abstract: An amorphous electrically conductive oxide such as In—Zn—O-containing amorphous oxide or amorphous ITO is used alone, or a laminate having a two- or three-layer structure constituted of the amorphous electrically conductive oxide and at least a thin metal layer is used, to form a transparent electrode whose side surface has a tapered form and whose top layer is formed of a layer of the above amorphous electrically conductive oxide, an organic single-layer portion or an organic multi-layer portion containing at least an organic light-emitting material is formed on the above transparent electrode, and further, an opposing electrode is formed on the above organic single-layer portion or the above organic multi-layer portion, whereby an organic EL device is obtained. A flattening layer is optionally provided so as to abut on the side surface of the transparent electrode for moderating a height-level difference between the above transparent electrode and the surface of the above substrate. Further, the above organic EL device is used to form an organic EL display panel.

Extended arrays of vertically aligned sub-10 nm diameter [100] Si nanowires by metal-assisted chemical etching.

Abstract: Large-area high density silicon nanowire (SiNW) arrays were fabricated by metal-assisted chemical etching of silicon, utilizing anodic aluminum oxide (AAO) as a patterning mask of a thin metallic film on a Si (100) substrate. Both the diameter of the pores in the AAO mask and the thickness of the metal film affected the diameter of SiNWs. The diameter of the SiNWs decreased with an increase of thickness of the metal film. Large-area SiNWs with average diameters of 20 nm down to 8 nm and wire densities as high as 10 10 wires/cm 2 were accomplished. These SiNWs were single crystalline and vertically aligned to the (100) substrate. It was revealed by transmission electron microscopy that the SiNWs were of high crystalline quality and showed a smooth surface.

Solid oxide fuel cell with corrugated thin film electrolyte.

Abstract: A low temperature micro solid oxide fuel cell with corrugated electrolyte membrane was developed and tested. To increase the electrochemically active surface area, yttria-stabilized zirconia membranes with thickness of 70 nm were deposited onto prepatterned silicon substrates. Fuel cell performance of the corrugated electrolyte membranes released from silicon substrate showed an increase of power density relative to membranes with planar electrolytes. Maximum power densities of the corrugated fuel cells of 677 mW/cm2 and 861 mW/cm2 were obtained at 400 and 450 °C, respectively.

Methods of removing silicon oxide and gaseous mixtures for achieving same

Abstract: A method of removing at least a portion of a silicon oxide material is disclosed. The silicon oxide is removed by exposing a semiconductor structure comprising a substrate and the silicon oxide to an ammonium fluoride chemical treatment and a subsequent plasma treatment, both of which may be effected in the same vacuum chamber of a processing apparatus. The ammonium fluoride chemical treatment converts the silicon oxide to a solid reaction product in a self-limiting reaction, the solid reaction product then being volatilized by the plasma treatment. The plasma treatment includes a plasma having an ion bombardment energy of less than or equal to approximately 20 eV. An ammonium fluoride chemical treatment including an alkylated ammonia derivative and hydrogen fluoride is also disclosed.

Nucleation mechanism of gallium-assisted molecular beam epitaxy growth of gallium arsenide nanowires

Abstract: Molecular beam epitaxy Ga-assisted synthesis of GaAs nanowires is demonstrated. The nucleation and growth are seen to be related to the presence of a SiO2 layer previously deposited on the GaAs wafer. The interaction of the reactive gallium with the SiO2 pinholes induces the formation of nanocraters, found to be the key for the nucleation of the nanowires. With SiO2 thicknesses up to 30nm, nanocraters reach the underlying substrate, resulting into a preferential growth orientation of the nanowires. Possibly related to the formation of nanocraters, we observe an incubation period of 258s before the nanowires growth is initiated.

Light-Extraction Enhancement of GaInN Light-Emitting Diodes by Graded-Refractive-Index Indium Tin Oxide Anti-Reflection Contact†

Abstract: tion (AR) coatings, [7–10] and optical resonators. [11] In many cases, however, the unavailability of materials with desired refractive indices, particularly materials with very low refractive indices, prevents the implementation of optical components with very high performance. In addition, the choice of a material with desired refractive index often forces a compromise in other materials properties such as optical transmittance and electrical conductivity that are also important for most optoelectronic applications. Here, we show that oblique-angle deposition can be used to tailor the refractive index of a thinfilm material that is chosen for its desired material properties other than refractive index. The unique ability to control the refractive index of thin film materials allows one to eliminate Fresnel reflection, one of the fundamental limitations in lightextraction efficiency of light-emitting diodes (LEDs), by fabricating coatings whose refractive index gradually decreases from the refractive index of the active semiconductor layer to the refractive index of the surrounding medium. As an example of this concept, we present a six-layer graded-refractiveindex (GRIN) AR coating made entirely of a single material, indium tin oxide (ITO), chosen for its high conductivity, high optical transmittance, and low contact resistance with GaN. Each layer has a refractive index that is individually tuned to form a stack with refractive index graded from its dense ITO value down to the value close to that of air for an optimum AR performance. It is shown that GaInN LEDs with a GRIN ITOAR contact achieve a light-extraction efficiency enhancement of 24.3 % compared to the LEDs with dense ITO coating due to a strongly reduced Fresnel reflection at the ITO– air interface. Oblique-angle deposition is a method of growing porous thin films, and hence thin films with low-refractive index (lown), enabled by surface diffusion and self-shadowing effects during the deposition process. [12–16] In oblique-angle deposition, a random growth fluctuation on the substrate produces a shadow region that the incident vapor flux cannot reach, and a non-shadow region where incident flux deposits preferentially, thereby creating an oriented rodlike structure with high porosity. Figure 1 shows the cross-sectional scanning-electron microscopy (SEM) image of low-n ITO, which is electrically conductive and optically transparent in visible wavelengths, COMMUNICATION

Semiconductor light emitting element

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor light emitting element for achieving heat dissipation property and low threshold currents without adding any special process. SOLUTION: A semiconductor integrated structure 11 is arranged at one face side of a substrate 10. The semiconductor integrated structure 11 is configured by laminating: a lower DBR mirror layer 12; a low spacer layer 13; an active layer 14; an upper spacer layer 15; a current constriction layer 16; an upper DBR mirror layer 17; and a contact layer 18 in this order from the substrate 10 side. A columnar mesa section 19 and a columnar heat dissipation section 20 are integrally formed in the semiconductor integrated structure 11. The mesa section 19 is formed corresponding to a region including the non-oxidized region (current injection region 16B) of the current constriction layer 16, and the heat dissipation section 20 is formed corresponding to the oxidized region (current constriction region 16A) of the current constriction layer 16. COPYRIGHT: (C)2008,JPO&INPIT

Fabrication of slantingly-aligned silicon nanowire arrays for solar cell applications

Abstract: Large-area slantingly-aligned silicon nanowire arrays (SA-SiNW arrays) on Si(111) substrate have been fabricated by wet chemical etching with dry metal deposition method and employed in the fabrication of solar cells for the first time. The formation of SA-SiNW arrays possibly results from the anisotropic etching of silicon by silver catalysts. Superior to the previous cells fabricated with vertically-aligned silicon nanowire arrays (VA-SiNW arrays), the SA-SiNW array solar cells exhibit a highest power conversion efficiency of 11.37%. The improved device performance is attributed to the integration of the excellent anti-reflection property of the arrays and the better electrical contact of the cell as a result of the special slantingly-aligned structure. The high surface recombination velocity of minority carriers in SiNW arrays is still the main limitation on cell performance.

Germanium FinFETs having dielectric punch-through stoppers

Abstract: A method of forming a semiconductor structure includes providing a composite substrate, which includes a bulk silicon substrate and a silicon germanium (SiGe) layer over and adjoining the bulk silicon substrate. A first condensation is performed to the SiGe layer to form a condensed SiGe layer, so that the condensed SiGe layer has a substantially uniform germanium concentration. The condensed SiGe layer and a top portion of the bulk silicon substrate are etched to form a composite fin including a silicon fin and a condensed SiGe fin over the silicon fine. The method further includes oxidizing a portion of the silicon fin; and performing a second condensation to the condensed SiGe fin.

Monolithic GaAs/InGaP nanowire light emitting diodes on silicon

Abstract: Vertical light emitting diodes (LEDs) based on GaAs/InGaP core/shell nanowires, epitaxially grown on GaP and Si substrates, have been fabricated. The devices can be fabricated over large areas and can be precisely positioned on the substrates, by the use of standard lithography techniques, enabling applications such as on-chip optical communication. LED functionality was established on both kinds of substrate, and the devices were evaluated in terms of temperature-dependent photoluminescence and electroluminescence.

Ambipolar, high performance, acene-based organic thin film transistors.

Abstract: We present a high performance, ambipolar organic field-effect transistor composed of a single material. Ambipolar molecules are rare, and they can enable low-power complementary-like circuits. This low band gap, asymmetric linear acene contains electron-withdrawing fluorine atoms, which lower the molecular orbital energies, allowing the injection of electrons. While hole and electron mobilities of up to 0.071 and 0.37 cm2/V·s, respectively, are reported on devices measured in nitrogen, hole mobilities of up to 0.12 cm2/V·s were found in ambient, with electron transport quenched. These devices were fabricated on octadecyltrimethoxysilane-treated surfaces at a substrate temperature of 60 °C.

Method for manufacturing photoelectric conversion device

Abstract: A photoelectric conversion device which is excellent in photoelectric conversion characteristics is provided by effectively utilizing silicon semiconductor materials. The present invention relates to a method for manufacturing a photoelectric conversion device using a solar cell, in which a plurality of single crystal semiconductor substrates in each of which a damaged layer is formed at a predetermined depth is arranged over a supporting substrate having an insulating surface; a surface layer part of the single crystal semiconductor substrate is separated thinly using the damaged layer as a boundary so as to form a single crystal semiconductor layer over one surface of the supporting substrate; and the single crystal semiconductor layer is irradiated with a laser beam from a surface side which is exposed by separation of the single crystal semiconductor layer to planarize the surface of the single crystal semiconductor layer.

Nanofocusing in laterally tapered plasmonic waveguides

Abstract: We investigate the focusing of surface plasmon polaritons (SPPs) excited with 1.5 µm light in a tapered Au waveguide on a planar dielectric substrate by experiments and simulations. We find that nanofocusing can be obtained when the asymmetric bound mode at the substrate side of the metal film is excited. The propagation and concentration of this mode to the tip is demonstrated. No sign of a cutoff waveguide width is observed as the SPPs propagate along the tapered waveguide. Simulations show that such concentrating behavior is not possible for excitation of the mode at the low-index side of the film. The mode that enables the focusing exhibits a strong resemblance to the asymmetric mode responsible for focusing in conical waveguides. This work demonstrates a practical implementation of plasmonic nanofocusing on a planar substrate.

A multiaxial stretchable interconnect using liquid-alloy-filled elastomeric microchannels

Abstract: We report on the fabrication and characterizations of a multiaxial stretchable interconnect using room-temperature liquid-alloy-filled elastomeric microchannels. Polydimethylsiloxane (PDMS) microchannels coated at the bottom with a gold wetting layer were used as the reservoirs which were subsequently filled by room-temperature liquid alloy using microfluidic injection technique. Using a diamond-shaped geometry to provide biaxial performance, a maximum stretchability of 100% was achieved (ΔR=0.24Ω). Less than 0.02Ω resistance variation was measured for 180° bending. Active electronics, light emitting diode, was also integrated onto the PDMS substrate with stretchable interconnects to demonstrate stable electrical connection during stretching, bending, and twisting.

Suppression of martensitic phase transition at the Ni2MnGa film surface

Abstract: We investigated magnetic and structural properties at the surface of epitaxial Ni2MnGa(110) Heusler films using x-ray absorption spectroscopy and x-ray magnetic circular dichroism both in transmission and total electron yield mode. The magnetic shape memory films were prepared by dc sputtering from a stoichiometric target onto sapphire substrates at an optimized substrate temperature of 773K. X-ray diffraction confirms a (110) oriented growth on Al2O3(112¯0) and an austenite to martensite transition at 270–280K. At the surface the martensitic phase transition and the magnetization are strongly suppressed. The deviation in the surface properties is caused by a Mn deficiency near the surface.

Atomic layer deposition processes for non-volatile memory devices

Abstract: Embodiments of the invention provide memory devices and methods for forming memory devices. In one embodiment, a memory device is provided which includes a floating gate polysilicon layer disposed over source/drain regions of a substrate, a silicon oxynitride layer disposed over the floating gate polysilicon layer, a first aluminum oxide layer disposed over the silicon oxynitride layer, a hafnium silicon oxynitride layer disposed over the first aluminum oxide layer, a second aluminum oxide layer disposed over the hafnium silicon oxynitride layer, and a control gate polysilicon layer disposed over the second aluminum oxide layer. In another embodiment, a memory device is provided which includes a control gate polysilicon layer disposed over an inter-poly dielectric stack disposed over a silicon oxide layer disposed over the floating gate polysilicon layer. The inter-poly dielectric stack contains two silicon oxynitride layers separated by a silicon nitride layer.

Plasma treatment apparatus

Abstract: PROBLEM TO BE SOLVED: To provide a plasma treatment apparatus in which treatment can be uniformly performed by using a sheet-shaped plasma even when a treatment object is a three-dimensional structure. SOLUTION: A pair of magnetic fields heading toward a plasma axis from opposite directions are applied to the plasma drawn out from an intermediate electrode toward an anode to widen a plasma diameter in a direction crossing the same and to flatten a sectional shape of the plasma. The application direction of the pair of the magnetic fields are rotated around the axis to incline the flat direction of the plasma around the axis. As a result, the plasma is inclined and brought near to the end (side face portion) of the substrate of a three-dimensional structure and therefore, the distribution of the treatment speeds in the central part and ends of the substrate can be reduced and the treatment speed can be improved. COPYRIGHT: (C)2008,JPO&INPIT

Method of forming silicon-containing films

Abstract: A method of forming a silicon-containing film comprising providing a substrate in a reaction chamber, injecting into the reaction chamber at least one silicon-containing compound; injecting into the reaction chamber at least one co-reactant in the gaseous form; and reacting the substrate, silicon-containing compound, and co-reactant in the gaseous form at a temperature equal to or less than 550°C to obtain a silicon-containing film deposited onto the substrate. A method of preparing a silicon nitride film comprising introducing a silicon wafer to a reaction chamber; introducing a silicon-containing compound to the reaction chamber; purging the reaction chamber with an inert gas; and introducing a nitrogen-containing co-reactant in gaseous form to the reaction chamber under conditions suitable for the formation of a monomolecular layer of a silicon nitride film on the silicon wafer.

Controlled Growth of Two-Dimensional and One-Dimensional ZnO Nanostructures on Indium Tin Oxide Coated Glass by Direct Electrodeposition

Abstract: A simple electrochemical deposition technique is used to deposit ZnO nanostructures with diverse morphology directly on ITO-coated glass substrates at 70 °C. The concentration of the Zn(NO3)2·6H2O electrolyte is important to controlling the dimensionality of the nanostructures, with formation of one-dimensional (1D) nanospikes and nanopillars (with 50−500 nm diameter) below 0.01 M and of two-dimensional (2D) nanowalls and nanodisks (with 50−100 nm wall/disk thickness) above 0.05 M. Glancing-incidence X-ray diffraction study shows their wurtzite structure and confirms the change in the preferred crystal plane orientation with the dimensionality of ZnO nanostructures. UV−vis spectroscopy reveals a higher transmittance from 2D nanostructures than from 1D nanostructures and their optical direct band gaps estimated to be 3.12−3.27 eV. Depth-profiling X-ray photoemission studies show the presence of Zn(OH)2 outer layers on the ZnO nanostructures, with a higher Zn(OH)2 moiety for 2D nanostructures relative to 1D...

Silicon nanoribbons for electrical detection of biomolecules.

Abstract: Direct electrical detection of biomolecules at high sensitivity has recently been demonstrated using semiconductor nanowires. Here we demonstrate that semiconductor nanoribbons, in this case, a thin sheet of silicon on an oxidized silicon substrate, can approach the same sensitivity extending below the picomolar concentration regime in the biotin/streptavidin case. This corresponds to less than ∼20 analyte molecules bound to receptors on the nanoribbon surface. The micrometer-size lateral dimensions of the nanoribbon enable optical lithography to be used, resulting in a simple and high-yield fabrication process. Electrical characterization of the nanoribbons is complemented by computer simulations showing enhanced sensitivity for thin ribbons. Finally, we demonstrate that the device can be operated both in inversion as well as in accumulation mode and the measured differences in detection sensitivity are explained in terms of the distance between the channel and the receptor coated surface with respect to...

Microstructures of CGO and YSZ Thin Films by Pulsed Laser Deposition

Abstract: Yttrium-stabilized zirconia (YSZ) and cerium gadolinium oxide (CGO) thin films were prepared by pulsed laser deposition (PLD) under different ambient pressures and substrate temperatures. The microstructures of the obtained films are compared with existing structural zone models for thin-film growth. The model developed by Thornton (1974) for metallic sputtered films is applied to the metal oxide films grown by PLD and gives a good description for the growth process and the dependence of the microstructure on deposition temperature and pressure. A map of formed microstructures is compiled as a function of back- ground pressure and substrate temperature, and the conditions to obtain dense or porous films for YSZ and CGO are estab- lished. The two materials show the same dependence on temperature and pressure. Higher background pressure yields more porous films and a fully dense structure cannot be achieved for substrate temperatures in the range from room temperature to 800°C. Of special interest for us was the realization and characterization of dense films processed at low temperature (< 500°C) for the preparation of free-standing membranes to be used in a micro solid oxide fuel cell. We could achieve such films by pro- cessing at 400°C in 0.026 mbar of oxygen. In-plane electric conductivities of the films were measured and correlated with the microstructures.