Institution
University of Colorado Colorado Springs
Education•Colorado Springs, Colorado, United States•
About: University of Colorado Colorado Springs is a education organization based out in Colorado Springs, Colorado, United States. It is known for research contribution in the topics: Population & Poison control. The organization has 6664 authors who have published 10872 publications receiving 323416 citations. The organization is also known as: UCCS & University of Colorado at Colorado Springs.
Topics: Population, Poison control, Thin film, Capacitor, Ferroelectricity
Papers published on a yearly basis
Papers
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TL;DR: In this paper, the authors present a concept of dynamic capabilities to model the ability of an organization to respond effectively to changes in the environment and leverage performance, using this capability as a mediating variable, IT support of knowledge management in a sample of managers from 500 manufacturing firms in Taiwan.
Abstract: Information technology (IT) is applied in many settings of knowledge management (KM) under the premise that a manufacturing organization will gain direct benefit from the investment. However, direct links from investment in IT to organizational performance have always been elusive. Strategic management research presents a concept of dynamic capabilities to model the ability of an organization to respond effectively to changes in the environment and leverage performance. By using this capability as a mediating variable, IT support of KM is shown to indirectly benefit manufacturing organizations in a sample of managers from 500 manufacturing firms in Taiwan. This link indicates firms must carefully align the IT support to strategic needs.
132 citations
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02 Jul 1987TL;DR: In this article, a memory cell includes an SRAM flip-flop cell having two nodes coupled to ferroelectric capacitors so that when the SRAM is powered down, the ferro-electric devices store data and upon power up, transfer the stored data to the memory cell.
Abstract: A memory cell includes an SRAM flip-flop cell having two nodes coupled to ferroelectric capacitors so that when the SRAM is powered down, the ferroelectric devices store data and upon power up, transfer the stored data to the SRAM cell. The ferroelectric devices can be bypassed during normal SRAM operations to reduce hysteresis fatigue.
132 citations
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TL;DR: In this article, the magnitude of the intensity, referred to as the notch stress intensity, characterizes the stress state in the region of the notch tip was determined for two mode I-type specimens that are proposed to characterize a critical value of Kn.
132 citations
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21 May 1993
TL;DR: In this paper, a liquid precursor containing a metal is applied to a substrate, RTP baked, and annealed to form a layered superlattice material, which is formed in two layers, the first layer using a stoichiometric precursor and the second layer using an excess bismuth precursor.
Abstract: A liquid precursor containing a metal is applied to a substrate, RTP baked, and annealed to form a layered superlattice material. Prebaking the substrate and oxygen in the RTP and anneal is essential, except for high bismuth content precursors. Excess bismuth between 110% and 140% of stoichiometry and RTP temperature of 725° C. is optimum. The film is formed in two layers, the first of which uses a stoichiometric precursor and the second of which uses an excess bismuth precursor. The electronic properties are so regularly dependent on process parameters and material composition, and such a wide variety of materials are possible, that electronic devices can be designed by selecting from a continuous record of the values of one or more electronic properties as a continuous function of the process parameters and material composition, and utilizing the selected process and material composition to make a device.
132 citations
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11 Nov 1990TL;DR: A hierarchical leakage fault analysis methodology is proposed for IDDQ (quiescent power supply current) testing of VLSI CMOS circuits, and the total test time for IDdQ measurements can be reduced significantly.
Abstract: A hierarchical leakage fault analysis methodology is proposed for IDDQ (quiescent power supply current) testing of VLSI CMOS circuits. A software system, QUIETEST, has been developed on the basis of this methodology. The software can select a small number of test vectors for IDDQ testing from the provided functional test set. Therefore, the total test time for IDDQ measurements can be reduced significantly to make IDDQ testing of VLSI CMOS circuits feasible in a production test environment. For two VLSI circuits QUIETEST was able to select less than 1% of functional test vectors from the full test set for covering as many leakage faults as would be covered if IDDQ was measured upon the application of 100% of the vectors. >
132 citations
Authors
Showing all 6706 results
Name | H-index | Papers | Citations |
---|---|---|---|
Jeff Greenberg | 105 | 542 | 43600 |
James F. Scott | 99 | 714 | 58515 |
Martin Wikelski | 89 | 420 | 25821 |
Neil W. Kowall | 89 | 279 | 34943 |
Ananth Dodabalapur | 85 | 394 | 27246 |
Tom Pyszczynski | 82 | 246 | 30590 |
Patrick S. Kamath | 78 | 466 | 31281 |
Connie M. Weaver | 77 | 473 | 30985 |
Alejandro Lucia | 75 | 680 | 23967 |
Michael J. McKenna | 70 | 356 | 16227 |
Timothy J. Craig | 69 | 458 | 18340 |
Sheldon Solomon | 67 | 150 | 23916 |
Michael H. Stone | 65 | 370 | 16355 |
Christopher J. Gostout | 65 | 334 | 13593 |
Edward T. Ryan | 60 | 303 | 11822 |