R
Rao Tummala
Researcher at Georgia Institute of Technology
Publications - 628
Citations - 12781
Rao Tummala is an academic researcher from Georgia Institute of Technology. The author has contributed to research in topics: Interposer & Capacitor. The author has an hindex of 43, co-authored 623 publications receiving 11663 citations. Previous affiliations of Rao Tummala include Qualcomm & IBM.
Papers
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Journal ArticleDOI
PWB compatible high value integral capacitors by MOCVD
Abstract: The 1998 National Electronics Manufacturing Technology Roadmap indicates that a capacitance density of ∼50 nF cm−2 will be required in 2001 for successful implementation of integral passive technology in the microelectronics packaging industries. Higher permittivity polymer/ceramic nanocomposites have been proven to be a viable option for integral capacitors on printed wiring boards (PWB). Although the nanocomposite materials are in their developmental stage, it is unlikely that this materials system could meet such high capacitance needs and still utilize a large area manufacturable process. In this study, an alternative metal organic chemical vapor deposition (MOCVD) technique has been implemented to deposit TiO2 thin film dielectrics at temperatures below 180 °C with higher capacitance densities. Two different metal-dielectric-metal type parallel plate capacitor structures have been fabricated on silicon and PWB substrates for relatively high frequency (45 MHz–1 GHz) and low frequency (100 Hz–1 MHz) characterization. Copper was used as the ground and upper electrodes with a 10 nm Cr adhesion layer between the dielectric and the electrodes. Capacitance was measured using a Keithley LCZ meter and a HP4194 impedance gain-phase analzer at the lower frequency range. Specific capacitance as high as 200 nF cm−2 was achieved at 1 MHz from devices built on silicon substrates and at 100 kHz from devices on PWB substrates. For the first time, thin film TiO2 on PWB substrates is reported at temperatures below 180 °C using MOCVD.
Proceedings ArticleDOI
Recent advances in low CTE and high density system-on-a-package (SOP) substrate with thin film component integration
Venky Sundaram,Rao Tummala,B. Wiedenman,Fuhan Liu,P. Markondeya Raj,I.R. Abothu,Swapan K. Bhattacharya,M. Varadarajan,E. Bongio,W. Sherwood +9 more
TL;DR: In this paper, the authors have developed a platform substrate technology providing very high wiring density and embedded thin film passive and active components using PWB compatible materials and processes using 10/spl mu/m BCB dielectric films.
Proceedings ArticleDOI
System-on-a-package (SOP) module development for a digital, RF and optical mixed signal integrated system
Kyutae Lim,Lixi Wan,Daniel Guidotti,Venky Sundaram,George E. White,Fuhan Liu,Swapan K. Bhattacharya,R. Doraiswami,Yin-Jung Chang,Jianjun Yu,Saikat Sarkar,R.J. Pratap,S.-W. Yoon,M. Maeng,Stephane Pinel,J. Laskar,M.M. Tentzeris,Gee-Kung Chang,Madhavan Swaminathan,Rao Tummala +19 more
TL;DR: In this article, the authors have developed a highly integrated mixed-signal testbed to demonstrate the concept and realization of advanced System-on-a-Package (SOP) concept, which deals with three different status of the signals, digital, RF and optical, in a single packaging platform.
Journal ArticleDOI
High- $k$ Thin-Film Capacitors With Conducting Oxide Electrodes on Glass Substrates for Power-Supply Applications
TL;DR: In this paper, high-$k$ barium strontium titanate (BST) thin films were sputter deposited onto solution-derived lanthanum nickel oxide (LNO) electrodes to demonstrate integrated capacitors for power supply in high speed digital packages.
Proceedings ArticleDOI
Integrated Copper Heat Slugs and EMI Shields in Panel Laminate (LFO) and Glass Fanout (GFO) Packages for High Power RF ICs
Venky Sundaram,Bartlet H. DeProspo,Nahid Gezgin,Atomu Watanabe,P. Markondeya Raj,Fuhan Liu,Waylon Puckett,Samuel Graham,Rao Tummala,Kyle Byers,Sean Garrison +10 more
TL;DR: In this paper, a double-sided panel laminate fanout and glass fan-out (GFO) package with embedded copper heat spreaders and electromagnetic shields for packaging high-power RF ICs in much smaller form factors and at potentially much lower cost than current ceramic and metal flange packages.