Journal ArticleDOI
A review of recent MOSFET threshold voltage extraction methods
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TLDR
Several of the extraction methods currently used to determine the value of threshold voltage from the measured drain current versus gate voltage transfer characteristics, focusing specially on single-crystal bulk MOSFETs are reviewed.About:
This article is published in Microelectronics Reliability.The article was published on 2002-04-01. It has received 813 citations till now. The article focuses on the topics: Subthreshold conduction & Overdrive voltage.read more
Citations
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Journal ArticleDOI
Suppression of short channel effects in FinFETs using crystalline ZrO 2 high-K/Al 2 O 3 buffer layer gate stack for low power device applications
Meng-Chen Tsai,Chin-I Wang,Yen-Chang Chen,Yi-Ju Chen,Kai-Shin Li,Min-Cheng Chen,Miin-Jang Chen +6 more
Proceedings ArticleDOI
New method for the automated massive characterization of Bias Temperature Instability in CMOS transistors
P. Saraza-Canflanca,Javier Diaz-Fortuny,Rafael Castro-Lopez,Elisenda Roca,Javier Martin-Martinez,Rosana Rodriguez,Montserrat Nafria,Francisco V. Fernández +7 more
TL;DR: A novel algorithm that allows the precise and fully automated parameter extraction from experimental BTI recovery current traces is presented, based on the Maximum Likelihood Estimation principles, and is able to extract the threshold voltage shifts and emission times associated to oxide trap emissions duringBTI recovery, required to properly model the phenomenon.
Proceedings ArticleDOI
Recoverable and permanent components of V T shift in pulsed NBT stressed p-channel power VDMOSFETs
TL;DR: In this article, the authors investigated NBTI in commercial IRF9520 p-channel VDMOSFETs under both static and pulsed bias stress conditions, and showed that the pulsed voltage stressing caused generally lower shifts as compared to static stressing performed at the same temperature with equal stress voltage magnitude.
Proceedings ArticleDOI
0.7 V supply self-biased nanoWatt MOS-only threshold voltage monitor
TL;DR: A process independent design methodology is proposed, evaluating different trade-offs of accuracy, area and power consumption of the self-biased MOSFET threshold voltage VT0 monitor with good accuracy on a 180 nm process.
Proceedings ArticleDOI
Modelling of threshold voltage shift in pulsed NBT stressed P-channel power VDMOSFETs
Danijel Dankovic,Ivica Manic,Ninoslav Stojadinović,Zoran Prijić,S. Djoric-Veljkovic,Vojkan Davidovic,Aneta Prijić,Albena Paskaleva,D. Spassov,Snežana Golubović +9 more
TL;DR: In this paper, negative bias temperature instabilities in commercial IRF9520 p-channel power VDMOSFETs under both static and pulsed bias stress conditions were studied.
References
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Semiconductor Material and Device Characterization
TL;DR: In this article, the authors present a characterization of the resistivity of a two-point-versus-four-point probe in terms of the number of contacts and the amount of contacts in the probe.
Journal ArticleDOI
New method for the extraction of MOSFET parameters
TL;DR: In this article, a new method for the extraction of the MOSFET parameters is presented, which relies on combining drain current and transconductance transfer characteristics, enabling reliable values of the threshold voltage V/sub t/, the low field mobility mu /sub 0/ and the mobility attenuation coefficient theta to be obtained.
Proceedings Article
Microelectronics reliability
TL;DR: In this article, the importance of the involvement of the design and manufacturing team in achieving reliability of microelectronic devices is highlighted. And a method of verifying reliability goals through calculation of failure rates based on life test parameters is described.
Journal ArticleDOI
Modeling of transconductance degradation and extraction of threshold voltage in thin oxide MOSFET's
TL;DR: In this article, the authors modify the Pao-Sah drain current model to incorporate a mobility model and obtain 3% accuracy from subthreshold to very strong inversion for a wide range of substrate biases.
Journal ArticleDOI
A new 'shift and ratio' method for MOSFET channel-length extraction
Yuan Taur,D.S. Zicherman,D.R. Lombardi,Phillip J. Restle,C.C.-H. Hsu,H.I. Nanafi,M.R. Wordeman,Bijan Davari,Ghavam G. Shahidi +8 more
TL;DR: In this paper, a shift-and-ratio method for channel length extraction is presented, where channel mobility can be any function of gate voltage, and high source-drain resistance does not affect extraction results.