Journal ArticleDOI
Influence of device engineering on the analog and RF performances of SOI MOSFETs
Valeriya Kilchytska,Amaury Nève,Laurent Vancaillie,David Levacq,Stéphane Adriaensen,H. van Meer,K. De Meyer,C. Raynaud,Morin Dehan,Jean-Pierre Raskin,Denis Flandre +10 more
TLDR
In this paper, the influence of various process options on the analog and RF properties of fully depleted (FD) silicon-on-insulator (SOI), partially depleted (PD) SOI, and bulk MOSFET's with gate lengths down to 0.08 /spl mu/m.Abstract:
This work presents a systematic comparative study of the influence of various process options on the analog and RF properties of fully depleted (FD) silicon-on-insulator (SOI), partially depleted (PD) SOI, and bulk MOSFET's with gate lengths down to 0.08 /spl mu/m. We introduce the transconductance-over-drain current ratio and Early voltage as key figures of merits for the analog MOS performance and the gain and the transition and maximum frequencies for RF performances and link them to device engineering. Specifically, we investigate the effects of HALO implantation in FD, PD, and bulk devices, of film thickness in FD, of substrate doping in SOI, and of nonstandard channel engineering (i.e., asymmetric Graded-channel MOSFETs and gate-body contacted DTMOS).read more
Citations
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Journal ArticleDOI
Estimation of analog/RF figures-of-merit using device design engineering in gate stack double gate MOSFET
TL;DR: In this article, the analog performance as well as some new RF figures of merit are reported for the first time of a gate stack double gate (GS-DG) metal oxide semiconductor field effect transistor (MOSFET) with various gates and channel engineering.
Journal ArticleDOI
Influence of Channel and Gate Engineering on the Analog and RF Performance of DG MOSFETs
TL;DR: This paper investigates the influence of both channel and gate engineering on the analog and RF performances of double-gate (DG) MOSFETs for system-on-chip applications and shows improvements in gate- and channel-engineered devices.
Journal ArticleDOI
Effect of Drain Doping Profile on Double-Gate Tunnel Field-Effect Transistor and its Influence on Device RF Performance
TL;DR: In this article, the effect of drain doping profile on a double-gate tunnel field effect transistor (DG-TFET) and its radio-frequency (RF) performances was investigated.
Journal ArticleDOI
Impact of high-k gate dielectric on analog and RF performance of nanoscale DG-MOSFET
TL;DR: An attempt to characterize the analog and RF performance of the high-k metal gate (HKMG) double gate (DG) metal oxide semiconductor field effect transistor (MOSFET) in nanoscale through 2-D device simulation.
Journal ArticleDOI
Analog/RF performance of multiple gate SOI devices: wideband simulations and characterization
TL;DR: In this paper, a wideband experimental and three-dimensional simulation analyses have been carried out to compare the analog/RF performance of planar double-gate (DG), triple-gate, Fin-FET, Pi-Gate (PG), and single-gate SOI MOSFETs.
References
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Substrate crosstalk reduction using SOI technology
TL;DR: In this paper, the authors analyzed both by simulations and measurements the substrate crosstalk performances of various Silicon-On-Insulator (SOI) technologies, and compared them to those of normal bulk CMOS process.
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Power Gain in Feedback Amplifier
TL;DR: In this paper, a linear three-terminal device Z is imbedded in a lossless passive network N and the properties of the complete system, as measured at two specified terminal pairs, are described by the open-circuit impedances Z_{11, Z_{12}, Z_{21, and Z_22.
Journal ArticleDOI
Self-heating effects in SOI MOSFETs and their measurement by small signal conductance techniques
TL;DR: In this article, a new thermal extraction technique based on an analytically derived expression for the electro-thermal drain conductance in saturation is presented, which can be used confidently over a wide range of bias conditions, with both fully and partially depleted devices.