Showing papers on "Breakdown voltage published in 2015"
TL;DR: In this paper, the temperature dependence of the forward bias gate breakdown has been characterized for enhancement-mode p-GaN gate AlGaN/GaN high-electron mobility transistors.
Abstract: In this letter, we studied the forward bias gate breakdown mechanism on enhancement-mode p-GaN gate AlGaN/GaN high-electron mobility transistors To the best of our knowledge, it is the first time that the temperature dependence of the forward gate breakdown has been characterized We report for the first time on the observation of a positive temperature dependence, ie, a higher temperature leads to a higher gate breakdown voltage Such unexpected behavior is explained by avalanche breakdown mechanism: at a high positive gate bias, electron/hole pairs are generated in the depletion region at the Schottky metal/p-GaN junction Furthermore, at a high gate bias but before the catastrophic gate breakdown, a light emission was detected by a emission microscopy measurement This effect indicates an avalanche luminescence, which is mainly due to the recombination of the generated electron/hole pairs
160 citations
TL;DR: In this article, an advanced edge termination technology has been developed by combining plasma treatment, tetramethylammonium hydroxide wet etching, and ion implantation to suppress the leakage along the etch sidewall.
Abstract: Conventional GaN vertical devices, though promising for high-power applications, need expensive GaN substrates. Recently, low-cost GaN-on-Si vertical diodes have been demonstrated for the first time. This paper presents a systematic study to understand and control the OFF-state leakage current in the GaN-on-Si vertical diodes. Various leakage sources were investigated and separated, including leakage through the bulk drift region, passivation layer, etch sidewall, and transition layers. To suppress the leakage along the etch sidewall, an advanced edge termination technology has been developed by combining plasma treatment, tetramethylammonium hydroxide wet etching, and ion implantation. With this advanced edge termination technology, an OFF-state leakage current similar to Si, SiC, and GaN lateral devices has been achieved in the GaN-on-Si vertical diodes with over 300 V breakdown voltage and 2.9-MV/cm peak electric field. The origin of the remaining OFF-state leakage current can be explained by a combination of electron tunneling at the p-GaN/drift-layer interface and carrier hopping between dislocation traps. The low leakage current achieved in these devices demonstrates the great potential of the GaN-on-Si vertical device as a new low-cost candidate for high-performance power electronics.
132 citations
TL;DR: In this article, the thermal conductivity, viscosity and breakdown voltage of solutions of diamond nanoparticles and multiwalled carbon nanotubes dispersed in mineral insulating oil for electrical transformers were measured using the transient hot wire method.
115 citations
TL;DR: In this paper, the tradeoff relation between ON-resistance and breakdown voltage in AlGaN/GaN HEMTs exceeded the SiC limit and was getting close to the GaN limit, but the breakdown voltage achieved was still lower than the theoretical impact ionization limit.
Abstract: This paper describes recent technological advances on III-nitride-based transistors for power switching applications. Focuses are placed on the progress toward enhancing the breakdown voltage, lowering the ON-resistance, suppressing current collapse, and reducing the leakage current in AlGaN/GaN high-electron mobility transistors (HEMTs). Recent publications revealed that the tradeoff relation between ON-resistance and breakdown voltage in AlGaN/GaN HEMTs exceeded the SiC limit and was getting close to the GaN limit; however, the breakdown voltage achieved was still lower than the theoretical impact ionization limit. A novel process featuring strain-controlled annealing with a metal stack, including Al gave rise to significant reduction in the sheet resistance in AlGaN/GaN heterostructures, suggesting the possibility of dramatic reduction in ON-resistance of GaN-based power devices. Some of the interesting approaches to suppress current collapse indicated that surface trapping effects must be controlled by the optimization of surface processing as well as by the reduction of bulk traps in the epitaxial layers. Close correlation between the local gate leakage current and point defects exposed on the free-standing GaN substrate demonstrated that further reduction of defects on bulk GaN substrates is truly required as future challenges.
105 citations
TL;DR: In this article, the authors demonstrate the use of solution-processed Ga2O3 thin films (TFs) for electronic device applications and demonstrate that the rectification ratio and reverse breakdown voltage of typical SDs were $6 \times 10^{6}$ and 19.6 V, respectively.
Abstract: This paper demonstrates the use of cost-effective solution-processed $\alpha $ -Ga2O3 thin films (TFs) for electronic device applications. MESFETs based on AgO x Schottky diode (SD) gates were fabricated on highly crystalline Sn-doped $\alpha $ -Ga2O3 TFs, grown by mist chemical vapor deposition at atmospheric pressure and a substrate temperature of only 400 °C. The rectification ratio and reverse breakdown voltage of typical SDs were $6 \times 10^{6}$ and 19.6 V, respectively. The ON–OFF ratio of the corresponding transistors was $2 \times 10^{7}$ . The MESFETs that could withstand drain voltages of up to 48 V were also realized.
87 citations
01 Jan 2015
TL;DR: In this paper, the authors reported record RF performance of deeply scaled depletionmode GaN-high-electron-mobility transistors (GaN-HEMTs) based on double heterojunction AlN/GaN/AlGaN epitaxial structure, fully passivated devices were fabricated by self-aligned-gate technology featuring recessed n + -GaN ohmic contact regrown by molecular beam epitaxy.
Abstract: This letter reports record RF performance of deeply scaled depletion-mode GaN-high-electron-mobility transistors (GaN-HEMTs). Based on double heterojunction AlN/GaN/AlGaN epitaxial structure, fully passivated devices were fabricated by self-aligned-gate technology featuring recessed n + -GaN ohmic contact regrown by molecular beam epitaxy. Record-high fT of 454 GHz and simultaneous fmax of 444 GHz were achieved on a 20-nm gate HEMT with 50-nm-wide gate- source and gate-drain separation. With an OFF-state breakdown voltage of 10 V, the Johnson figure of merit of this device reaches 4.5 THz-V, representing the state-of-the-art performance of GaN transistor technology to-date. Compared with previous E-mode GaN-HEMTs of similar device structure, significantly reduced extrinsic gate capacitance and enhanced average electron velocity are the key reasons for improved frequency characteristic.
86 citations
TL;DR: In this article, a low pressure chemical vapor deposition (LPCVD) was employed as gate dielectric for GaN-based metal-insulator-semiconductor high-electron-mobility transistors.
Abstract: In this letter, silicon nitride (SiN x ) film deposited at 780 °C by low-pressure chemical vapor deposition (LPCVD) was employed as gate dielectric for GaN-based metal–insulator–semiconductor high-electron-mobility transistors. The LPCVD-SiN x exhibit improved gate dielectric performance than the plasma enhanced chemical vapor deposition-SiN x , including smaller forward and reverse gate leakage, and higher forward gate breakdown voltage.
83 citations
TL;DR: In this paper, a CAVET with buried, conductive p-GaN layers as the current blocking layer is reported, with high ON current (10.9 kA/cm2) and low ON-resistance (0.4 mΩ cm2).
Abstract: The Current Aperture Vertical Electron Transistor (CAVET) combines the high conductivity of the two dimensional electron gas channel at the AlGaN/GaN heterojunction with better field distribution offered by a vertical design. In this work, CAVETs with buried, conductive p-GaN layers as the current blocking layer are reported. The p-GaN layer was regrown by metalorganic chemical vapor deposition and the subsequent channel regrowth was done by ammonia molecular beam epitaxy to maintain the p-GaN conductivity. Transistors with high ON current (10.9 kA/cm2) and low ON-resistance (0.4 mΩ cm2) are demonstrated. Non-planar selective area regrowth is identified as the limiting factor to transistor breakdown, using planar and non-planar n/p/n structures. Planar n/p/n structures recorded an estimated electric field of 3.1 MV/cm, while non-planar structures showed a much lower breakdown voltage. Lowering the p-GaN regrowth temperature improved breakdown in the non-planar n/p/n structure. Combining high breakdown vol...
80 citations
TL;DR: Initial reliability studies of vertical p–n diodes and vertical junction field effect transistors fabricated on pseudo bulk low defect density GaN substrates are discussed and it is observed that fundamental failure mechanisms are almost always traced back to the starting substrate material quality, substrate miscut angle, and surface morphology post epi growth.
79 citations
TL;DR: In this article, GaN p-n diodes can sustain single-pulse and repetitive inductive avalanche currents as high as 10 A. The 0.36mm2 vertical GaN P-n Diodes were shown to have a positive temperature coefficient and the temperature-dependent behavior of the breakdown voltage and reverse voltage at onset of avalanche.
Abstract: Inductive avalanche test results presented in this letter demonstrate that GaN p-n diodes can sustain single-pulse and repetitive inductive avalanche currents. The 0.36-mm2 vertical GaN p-n diodes can sustain single-pulse avalanche currents as high as 10 A. The safe zone of the single-pulse avalanche current is limited by peak pulse power and energy deposited in the device. The temperature-dependent behavior of the breakdown voltage and the reverse-voltage at onset of avalanche has a positive temperature coefficient. Repetitive avalanche ruggedness testing was performed by applying $10^{\mathrm {5}}$ pulses at 5-kHz frequency with increasing repetitive stress current. Based on a population of 63 devices, the incremental failure rate under repetitive avalanche current increases with increasing avalanche current. The devices that survive the step stress test sustain no parametric drift under repetitive avalanche.
69 citations
Patent•
16 Jan 2015
TL;DR: A silicon carbide semiconductor device consisting of a substrate and a drift layer is described in this paper, where the doping concentration in the breakdown voltage holding layer continuously increases from the modulation point to the surface of the drift layer.
Abstract: A silicon carbide semiconductor device capable of achieving a decrease in ON resistance and an increase in breakdown voltage and a method for manufacturing a silicon carbide semiconductor device. A silicon carbide semiconductor device includes a silicon carbide substrate and a drift layer. The drift layer includes a breakdown voltage holding layer extending from a point where a doping concentration has a predetermined value to a surface of the drift layer. The doping concentration in the breakdown voltage holding layer continuously decreases from the point where the doping concentration has the predetermined value to a modulation point located further toward the surface of the drift layer than a midpoint in a film thickness direction of the breakdown voltage holding layer. The doping concentration in the breakdown voltage holding layer continuously increases from the modulation point to the surface of the drift layer.
TL;DR: By employing the linear increasing drift region width and the high-k dielectric region, a novel variation of lateral width (VLW) technique is proposed to even the equipotential contour and increase the drift doping concentration, which maximize the breakdown voltage and reduce the specific ON-resistance as discussed by the authors.
Abstract: By employing the linear increasing drift region width and the high-k dielectric region, a novel variation of lateral width (VLW) technique is proposed to even the equipotential contour and increase the drift doping concentration, which maximize the breakdown voltage and reduce the specific ON-resistance. The breakdown voltage exceeds 600 Von the VLW lateral double-diffused metal-oxide-semiconductor (LDMOS) with 1-μm silicon-on-insulator layer, 3-μm buried oxide, and 60-μm drift region length. The 3-D simulation indicates that the proposed device increases the breakdown voltage by 140%, while reduces the specific ON-resistance by 50% in comparison with the conventional (CONV) device with the same geometric parameters. Moreover, VLW LDMOS presents the best figure of merit, which is 10, 1.8, and 4.5 times higher than that of CONV, variation of lateral doping, and variation of lateral thickness devices, respectively.
TL;DR: In this paper, a single-crystal GaN substrates with very low dislocation densities were used for MBE growth and an on-resistance of 0.23 mΩ cm2 was achieved, with a breakdown voltage corresponding to a peak electric field of ∼3.1 MV/cm in GaN.
Abstract: Molecular beam epitaxy grown GaN p-n vertical diodes are demonstrated on single-crystal GaN substrates. A low leakage current <3 nA/cm2 is obtained with reverse bias voltage up to −20 V. With a 400 nm thick n-drift region, an on-resistance of 0.23 mΩ cm2 is achieved, with a breakdown voltage corresponding to a peak electric field of ∼3.1 MV/cm in GaN. Single-crystal GaN substrates with very low dislocation densities enable the low leakage current and the high breakdown field in the diodes, showing significant potential for MBE growth to attain near-intrinsic performance when the density of dislocations is low.
TL;DR: In this paper, the structure of GaN/AlGaN devices and their associated material growth and processing issues are examined in some detail, and extrapolations are made to predict what the advantages and challenges would accrue for similar AlGaN electrical and optical devices.
Abstract: The structure of a number of GaN/AlGaN devices and their associated material growth and processing issues are examined in some detail, and extrapolations are made to predict what the advantages and challenges would accrue for similar AlGaN electrical and optical devices. For RF HEMTs, it is likely that the advantages of the larger breakdown voltage (V
B) in an Al
Y
Ga1−Y
N/Al
X
Ga1−X
N AlGaN channel HEMT would be outweighed by the disadvantages of the lower frequency of operation created by the smaller channel mobility when compared to AlGaAs/GaAs HEMTs. The same thing can be said for lateral high-power electronic HEMTs because AlGaN/GaN HEMTs with GaN channels can now be fabricated with V
B ~ 2,000 V, which is thought to be the upper voltage limit for them, even when the device structures are grown on Si substrates with its accompanying high dislocation density and bow. However, theory suggests that using Al
Y
Ga1−Y
N/Al
X
Ga1−X
N structures in vertical transistors and AlGaN P–N diodes could enable pulsed power applications such as electric armor because they should be able to handle an order of magnitude more power due to their ten times larger breakdown field in ~80 % Al AlGaN, and the Si donor is still relatively shallow at this Al concentration. The major challenges to achieving these goals are to be able to controllably dope the AlGaN in the mid 1015 cm−3 range, create an AlGaN current blocking layer beneath the Al
Y
Ga1−Y
N/Al
X
Ga1−X
N channel that contains an aperture to the drain, confine most of the mismatch dislocations in the AlGaN layers to near the interface with the GaN or AlN substrate that is parallel to the (0001) plane, and fabricate ohmic contacts to the AlGaN with a specific contact resistance <10−2 Ω cm2. Theoretically, the latter can be achieved using polarization doping. For applications to optical device structures, reducing the threading dislocation density in AlN layers on sapphire substrates by high temperature epitaxy is a key parameter for achieving AlGaN-based light emitters with a high efficiency. Stress control and prevention of relaxation is important for obtaining AlGaN layers with a similar dislocation density as the underlying AlN template. A dislocation density below 5 × 108 cm−2 is sufficient for obtaining an efficiency of radiative recombination of 40 % and higher at moderate excitation levels.
TL;DR: In this article, a linear dependence of the passivity breakdown potential on the square root of potential scan rate ( ν 1/2 ), as predicted by the PDM, yields an estimate of the critical areal concentration of condensed cation vacancies at the metal/film interface that leads to the passingivity breakdown.
TL;DR: In this article, the experimental demonstration of time-dependent dielectric breakdown in GaN-based high-electron mobility transistors (HEMTs) submitted to OFF-state stress is presented.
Abstract: This paper reports the experimental demonstration of time-dependent dielectric breakdown in GaN-based high-electron mobility transistors (HEMTs) submitted to OFF-state stress. Based on combined breakdown measurements, constant voltage stress tests, and 2-D simulations, we demonstrate the following relevant results. First, GaN-based HEMTs with a breakdown voltage higher than 1000 V (evaluated by dc measurements) may show time-dependent failure when exposed to OFF-state stress with $V_{\mathrm {DS}}$ in the range 600–700 V. Second, time-to-failure (TTF) is Weibull-distributed, and has an exponential dependence on the stress voltage level. Third, time-dependent breakdown is ascribed to the failure of the SiN dielectric at the edge of the gate overhang, on the drain side. Fourth, 2-D simulations confirm that—in this region—the electric field exceeds 6 MV/cm, i.e., the dielectric strength of SiN. Finally, we demonstrate that by limiting the electric field in the nitride through epitaxy and process improvements, it is possible to increase the TTF by three orders of magnitude.
TL;DR: In the new capacitors, the large specific surface area of AAO can provide large capacitance, whereas uniform pore walls and hemispheric barrier layers can enhance breakdown voltage, and a high energy density can be achieved, showing promising potential in high-density electrical energy storage for various applications.
Abstract: Dielectric capacitors are promising candidates for high-performance energy storage systems due to their high power density and increasing energy density. However, the traditional approach strategies to enhance the performance of dielectric capacitors cannot simultaneously achieve large capacitance and high breakdown voltage. We demonstrate that such limitations can be overcome by using a completely new three-dimensional (3D) nanoarchitectural electrode design. First, we fabricate a unique nanoporous anodic aluminum oxide (AAO) membrane with two sets of interdigitated and isolated straight nanopores opening toward opposite planar surfaces. By depositing carbon nanotubes in both sets of pores inside the AAO membrane, the new dielectric capacitor with 3D nanoscale interdigital electrodes is simply realized. In our new capacitors, the large specific surface area of AAO can provide large capacitance, whereas uniform pore walls and hemispheric barrier layers can enhance breakdown voltage. As a result, a high energy density of 2 Wh/kg, which is close to the value of a supercapacitor, can be achieved, showing promising potential in high-density electrical energy storage for various applications.
TL;DR: In this paper, the approach of partial AlGaN recess and multiple layers of fluorinated Al2O3 gate dielectric is utilized to achieve highest reported positive gate threshold voltage ( $V_{{{\textrm {TH}}$ ) without severe reduction on 2-D electron gas carrier mobility in AlGAN/GaN HEMTs.
Abstract: In this letter, the approach of partial AlGaN recess and multiple layers of fluorinated Al2O3 gate dielectric is utilized to achieve highest reported positive gate threshold voltage ( $V_{{{\textrm {TH}}}}$ ) without severe reduction on 2-D electron gas carrier mobility in AlGaN/GaN HEMTs. Guided by the design and verification through analytical model, proper fluorine ions incorporation is made through fabrication. The approach resulted in a high $V_{{{\textrm {TH}}}}$ of +6.5 V and competitive drain saturation current ( $I_{{{\textrm {DMAX}}}}$ ) of 340 mA/mm. Furthermore, low gate leakage current and high breakdown voltage of 1140 V were also demonstrated.
TL;DR: In this article, Si-doped AlN layers were homoepitaxially grown by hydride vapor phase epitaxy on AlN(0001) seed substrates, and an n-type AlN substrate with a carrier concentration of 2.4 × 1014 cm−3 was obtained.
Abstract: Thick Si-doped AlN layers were homoepitaxially grown by hydride vapor phase epitaxy on AlN(0001) seed substrates. Following the removal of the seed substrate, an n-type AlN substrate with a carrier concentration of 2.4 × 1014 cm−3 was obtained. Vertical Schottky barrier diodes were fabricated by depositing Ni/Au Schottky contacts on the N-polar surface of the substrate. High rectification with a turn-on voltage of approximately 2.2 V was observed. The ideality factor of the diode at room temperature was estimated to be ~8. The reverse breakdown voltage, defined as the leakage current level of 10−3 A/cm2, ranged from 550 to 770 V.
01 Dec 2015
TL;DR: In this paper, an enhancement-mode GaN double-channel MOS-HEMT was fabricated on a double channel heterostructure, which features a 1.5-nm AlN layer inserted 6 nm below the conventional barrier/GaN hetero-interface, forming a lower channel at the interface between AlN-ISL and the underlying GaN.
Abstract: An enhancement-mode GaN double-channel MOS-HEMT (DC-MOS-HEMT) was fabricated on a double-channel heterostructure, which features a 1.5-nm AlN layer (AlN-ISL) inserted 6 nm below the conventional barrier/GaN hetero-interface, forming a lower channel at the interface between AlN-ISL and the underlying GaN. With the gate recess terminated at the upper GaN channel layer, a positive threshold voltage is obtained, while the lower channel retains its high 2DEG mobility as the heterojunction is preserved. The fabricated device delivers a small on-resistance, large current, high breakdown voltage, and sharp subthreshold swing. The large tolerance for gate recess depth is also confirmed by both simulation and experiment.
TL;DR: In this article, a partially recessed (Al) GaN barrier was realized by a fluorine plasma implantation/etch technique, which was able to produce two desirable results: 1) a well-controlled slow dry etching for gate recess and 2) implanting fluorine ions into the AlGaN barrier.
Abstract: Al2O3/AlGaN/GaN enhancement-mode metal-isolator-semiconductor high-electron-mobility transistor (MIS-HEMT) featuring a partially recessed (Al) GaN barrier was realized by a fluorine plasma implantation/etch technique. By properly adjusting the RF power driving the fluorine plasma, the fluorine plasma is able to produce two desirable results: 1) a well-controlled slow dry etching for gate recess and 2) implanting fluorine ions into the AlGaN barrier. The fluorine ions become negatively charged in the barrier layer and induce a positive shift in the threshold voltage. The proposed MIS-HEMT exhibits a threshold voltage ( $V_{\mathrm {\mathbf {TH}}})$ of +0.6 V at a drain current of $10~\mu \text{A}$ /mm, a maximum drive current of 730 mA/mm, an ON-resistance of $7.07~\Omega \,\cdot \,$ mm, and an OFF-state breakdown voltage of 703 V at an OFF-state drain leakage current of $1~\mu \text{A}$ /mm. From room temperature to 200 °C, the device exhibits a small negative shift of $V_{\mathrm {\mathbf {TH}}}$ ( $\sim 0.5$ V) that is attributed to the high-quality dielectric/F-implanted-(Al) GaN interface and the partially recessed barrier.
TL;DR: In this article, the breakdown mechanism of high-voltage GaN-HEMT was analyzed using the experimental I-V characteristics and two-dimensional device simulation results, and suppression of the impact ionization and the hole remove structure are effective for a highly reliable design concerning the breakdown.
TL;DR: In this article, a model for describing a photovoltaic module's internal thermal and electrical state, which cannot normally be measured, is proposed. But the model is not suitable for reliability testing and module engineering.
Abstract: Photovoltaic cells can be damaged by reverse bias stress, which arises during service when a monolithically integrated thin-film module is partially shaded. We introduce a model for describing a module's internal thermal and electrical state, which cannot normally be measured. Using this model and experimental measurements, we present several results with relevance for reliability testing and module engineering: Modules with a small breakdown voltage experience less stress than those with a large breakdown voltage, with some exceptions for modules having light-enhanced reverse breakdown. Masks leaving a small part of the masked cells illuminated can lead to very high temperature and current density compared with masks covering entire cells.
TL;DR: In this paper, a new prediction method for the breakdown voltages of typical air gaps based on the electric field features and support vector machine (SVM) was proposed, and the predicted results agree well with experimental values and simulated results of the published models.
Abstract: Breakdown voltage of the air gap is of vital importance for the design of the external insulation in high-voltage transmission and transformation projects. In this paper, a new prediction method for the breakdown voltages of typical air gaps based on the electric field features and support vector machine (SVM) was proposed. According to the finite element calculation results of static electric field distribution, the electric field values in the whole region, discharge channel, surface of the electrode and the shortest path were extracted and post-processed, which constituted the electric field features characterizing the gap structure. Then, the breakdown voltage prediction model of the air gap was established by using electric field features as the input parameters to SVM, and whether the gap breakdown would happen as the output parameters of SVM, which changing the regression problem to a binary classification problem. This model was applied to predict the power frequency breakdown voltages of different short air gaps including sphere-sphere gaps, rod-plane gaps, sphere-plane gaps and sphereplane- sphere gaps. The power frequency breakdown voltages of longer air gaps which are affected by corona, and the 50% positive switching impulse breakdown voltages of long sphere-plane gaps and rod-plane gaps were predicted as well. The predicted results agree well with experimental values and simulated results of the published models, which validate the effectiveness of the proposed model. This method supplies a new possible way to obtain the breakdown voltage of air gaps.
TL;DR: In this article, the roles of lightly doped carbon in a series of n-GaN Schottky diode epitaxial structures on freestanding GaN substrates, and evaluated the effects of the doping on diode performances.
Abstract: We studied the roles of lightly doped carbon in a series of n-GaN Schottky diode epitaxial structures on freestanding GaN substrates, and evaluated the effects of the doping on diode performances. A large variation of compensation ratio was observed for carbon doping at (1–2) × 1016 cm−3. A model was proposed to explain this phenomenon, in which a vulnerable balance between donor-type CGa and deep acceptor CN strongly affected the free-carrier generation. Application of Norde plots and reverse biased leakage current in current–voltage measurements suggested provisional optimization for a free-carrier concentration of 8 × 1015 cm−3 to achieve a tradeoff between breakdown voltage and on-resistance of the n-GaN diodes.
TL;DR: The first implementation of a single-photon avalanche diode in standard silicon on insulator (SOI) complementary metal-oxide-semiconductor (CMOS) technology is reported, which exhibits a timing response without exponential tail and provides a remarkable timing jitter of 65 ps (FWHM).
Abstract: This paper reports on the first implementation of a single-photon avalanche diode (SPAD) in standard silicon on insulator (SOI) complementary metal-oxide-semiconductor (CMOS) technology. The SPAD is realized in a circular shape, and it is based on a P+/N-well junction along with a P-well guard-ring structure formed by lateral diffusion of two closely spaced N-well regions. The SPAD electric-field profile is analyzed by means of simulation to predict the breakdown voltage and the effectiveness of premature edge breakdown. Measurements confirm these predictions and also provide a complete characterization of the device, including current-voltage characteristics, dark count rate (DCR), photon detection probability (PDP), afterpulsing probability, and photon timing jitter. The SOI CMOS SPAD has a PDP above 25% at 490-nm wavelength and, thanks to built-in optical sensitivity enhancement mechanisms, it is as high as 7.7% at 850-nm wavelength. The DCR is 244 Hz/μm2, and the afterpulsing probability is less than 0.1% for a dead time longer than 200 ns. The SPAD exhibits a timing response without exponential tail and provides a remarkable timing jitter of 65 ps (FWHM). The new device is well suited to operate in backside illumination within complex three-dimensional (3D) integrated circuits, thus contributing to a great improvement of fill factor and jitter uniformity in large arrays.
TL;DR: Results show that the Schottky Source Drain contact (SSD) high-k passivated AlGaN/GaN device is suitable for high power application.
TL;DR: In this article, a multi-scale breakdown measurement method for large-area dielectric breakdown characterization of polypropylene films is presented and evaluated based on the self-healing breakdown capability of metalized film, thus enabling the execution of detailed breakdown performance analysis.
Abstract: A multi-breakdown measurement method for large-area dielectric breakdown characterization of polymer films is presented and evaluated. Based on the self-healing breakdown capability of metalized film, large amount of breakdown data can be obtained from a relatively large total film area, thus enabling the execution of detailed breakdown performance analysis. The studied films include non-metalized laboratoryscale, pilot-scale and commercial capacitor-grade bi-axially oriented polypropylene films in the thickness range of 14-25 μm. With the active measurement area of 81 cm2 per sample, breakdown distributions covering total film areas of 486-972 cm2 are presented. Various aspects encompassing the sample film preparation, measurement procedure, breakdown progression, discharge event characterization, breakdown field determination, data validation and statistical analysis are discussed. Comparative small-area breakdown measurements were performed in order to study the relationship between the large-area multi-breakdown measurement method and a conventional small-area (1 cm2) manual breakdown measurement method. Implications of the areadependence and the applicability of the Weibull area-scaling are also discussed.
TL;DR: In this article, the authors proposed a PBO-PSOI structure for LDMOSFETs with periodic buried oxide layer (PBO) for enhancing breakdown voltage and self-heating effects (SHEs).
TL;DR: In this article, it was shown that it is possible to predict the breakdown voltages of arbitrary electrode configurations under standard voltage applications for electron attaching gases with a stepped leader model originally proposed for SF6.
Abstract: Recently it was shown that it is possible to predict the breakdown voltages of arbitrary electrode configurations under standard voltage applications for electron attaching gases with a stepped leader model originally proposed for SF6. In this contribution this model was applied to the hydrofluoroolefin HFO1234ze. The parameters, which are necessary for the modeling, are derived from measurement of statistical and formative time lags in an electrode configuration with a homogeneous background field with a small protrusion. The parameters are used to predict the breakdown voltage for technical relevant geometries and standard voltage wave shapes. To verify these predictions, breakdown experiments in nearly homogeneous and strongly inhomogeneous field configurations with AC and lightning impulse voltage application of both polarities were performed. The hydrofluoroolefin exhibits insulation properties which are quite similar to those of SF6. Therefore it could be considered as admixture for high voltage gaseous insulations or as replacement in medium voltage equipment. For applications using the pure gas the temperature and pressure range has to be limited to prevent liquefaction. The good match between the simulations and the experiments gives evidence that the model can be applied to a broad range of other novel electron attaching gases as well.