Evaluation of device parameters of HfO/sub 2//SiO/sub 2//Si gate dielectric stack for MOSFETs

Influence of 60-MeV Proton-Irradiation on Standard and Strained n- and p-Channel MuGFETs

Abstract: In this work the proton irradiation influence on Multiple Gate MOSFETs (MuGFETs) performance is investigated. This analysis was performed through basic and analog parameters considering four different splits (unstrained, uniaxial, biaxial, uniaxial+biaxial). Although the influence of radiation is more pronounced for p-channel devices, in pMuGFETs devices, the radiation promotes a higher immunity to the back interface conduction resulting in the analog performance improvement. On the other hand, the proton irradiation results in a degradation of the post-irradiated n-channel transistors behavior. The unit gain frequency showed to be strongly dependent on stress efficiency and the radiation results in an increase of the unit gain frequency for splits with high stress effectiveness for both cases p- and nMuGFETs.

Impact of proton irradiation on strained triple gate SOI p- and n-MOSFETs

Abstract: In this work the proton irradiation influence on basic and analog parameters of triple-gate SOI MOSFETs is investigated. The studied devices are strained and unstrained p- and nMuGFETs. The type of stress considered in each case, was the stress that results in a better performance of p- (CESL) and n-devices (sSOI+CESL). Although the results showed the worse behavior for post-irradiated nMOS transistors, a higher immunity to the back interface influence was obtained for post-irradiated pMOS devices and consequently a better analog performance was observed. The unit gain frequency improved for p and nMOS post-irradiated devices.

Analytical Model for Drain Current of a Ballistic MOSFET

Abstract: A simplified analytical approach within the framework of Landauer-Buttiker formalism has been employed to model the drain current in a ballistic n-channel metal oxide semiconductor field effect transistor (MOSFET) and the expression for the device threshold voltage has been obtained. To achieve ballistic operation the said MOSFET has been modeled considering low temperature (77 K) and intrinsic silicon channel for electronic motion of the charge carriers. The model incorporates quantum confinement effect, drain induced barrier lowering (DIBL) and short channel effects (SCE). Further, the effects due to surface scattering and back scattering are included in this model to obtain a near ballistic behavior. The current-voltage characteristics are compared with the available experimental results and are found to be in reasonable agreement.

Quantum mechanics: Non-relativistic theory,

Abstract: The basic concepts of quantum mechanics Energy and momentum Schrodinger's equation Angular momentum Perturbation theory Spin The identity of particles The atom The theory of symmetry Polyatomic molecules Motion in a magnetic field Nuclear structure Elastic collisions Mathematical appendices.

High-κ gate dielectrics: Current status and materials properties considerations

Abstract: Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success...

Thermodynamic stability of binary oxides in contact With silicon

Abstract: Using tabulated thermodynamic data, a comprehensive investigation of the thermo-dynamic stability of binary oxides in contact with silicon at 1000 K was conducted. Reactions between silicon and each binary oxide at 1000 K, including those involving ternary phases, were considered. Sufficient data exist to conclude that all binary oxides except the following are thermodynamically unstable in contact with silicon at 1000 K: Li2O, most of the alkaline earth oxides (BeO, MgO, CaO, and SrO), the column IIIB oxides (Sc2O3, Y2O3, and Re2O3, where Re is a rare earth), ThO2, UO2, ZrO2, HfO2, and Al2O3. Of these remaining oxides, sufficient data exist to conclude that BeO, MgO, and ZrO2 are thermodynamically stable in contact with silicon at 1000 K. Our results are consistent with reported investigations of silicon/binary oxide interfaces and identify candidate materials for future investigations.

Alternative dielectrics to silicon dioxide for memory and logic devices

Abstract: The silicon-based microelectronics industry is rapidly approaching a point where device fabrication can no longer be simply scaled to progressively smaller sizes. Technological decisions must now be made that will substantially alter the directions along which silicon devices continue to develop. One such challenge is the need for higher permittivity dielectrics to replace silicon dioxide, the properties of which have hitherto been instrumental to the industry's success. Considerable efforts have already been made to develop replacement dielectrics for dynamic random-access memories. These developments serve to illustrate the magnitude of the now urgent problem of identifying alternatives to silicon dioxide for the gate dielectric in logic devices, such as the ubiquitous field-effect transistor.

Quantum-mechanical modeling of electron tunneling current from the inversion layer of ultra-thin-oxide nMOSFET's

Abstract: Quantum-mechanical modeling of electron tunneling current from the quantized inversion layer of ultra-thin-oxide (<40 /spl Aring/) nMOSFET's is presented, together with experimental verification. An accurate determination of the physical oxide thickness is achieved by fitting experimentally measured capacitance-versus-voltage curves to quantum-mechanically simulated capacitance-versus-voltage results. The lifetimes of quasibound states and the direct tunneling current are calculated using a transverse-resonant method. These results are used to project an oxide scaling limit of 20 /spl Aring/ before the chip standby power becomes excessive due to tunneling currents,.