Soitec

About: Soitec is a company organization based out in Bernin, France. It is known for research contribution in the topics: Layer (electronics) & Silicon on insulator. The organization has 589 authors who have published 1062 publications receiving 13737 citations. The organization is also known as: Soitec (France).

Method of detaching a semiconductor layer

Abstract: The invention relates to a method of detachment of a layer from a wafer of material chosen from semiconductor materials, the method comprising the steps consisting of: creating an embrittlement zone in the thickness of the wafer, the said embrittlement zone defining the layer to be detached in the thickness of the wafer;subjecting the wafer to a treatment to perform detachment of the layer, at the level of the embrittlement zone; characterized in that during the creation of the embrittlement zone, a localized starting region of this zone is constituted, at the level of which the embrittlement zone locally has greater embrittlement, so that this starting region corresponds to a super-embrittled region of the embrittlement zone.

Process for fabricating a structure having a buried dielectric layer of uniform thickness

Abstract: A process is used for fabricating a final structure comprising in succession a useful semiconductor layer, a dielectric layer and a carrier substrate. The process comprises providing an intermediate structure including an upper layer, the dielectric layer and the carrier substrate, and finishing the intermediate structure to form the final structure by performing a treatment nonuniformly modifying the thickness of the dielectric layer following a predetermined dissolution profile. The dielectric layer of the intermediate structure has a thickness profile complementary to the predetermined dissolution profile.

Method for the production of a single-crystal film, in particular piezoelectric

Abstract: The invention relates to a method for the production of a single-crystal film (10), characterised in that it comprises the following successive steps: the provision of a donor substrate (100) comprising a piezoelectric material of composition ABO 3 , wherein A consists of at least one element from among Li, Na, K, H, Ca, and B consists of at least one element from among Nb, Ta, Sb, V; the provision of a receiver substrate (110); the transfer of a so-called "seed layer" from the donor substrate (100) to the receiver substrate (110), by means of bonding the donor substrate to the receiver substrate such that the seed layer (102) is located at the bonding interface, and the subsequent thinning of the donor substrate (100) as far as the seed layer (102); the epitaxial growth of a single-crystal film (103) on the piezoelectric material ABO 3 of the seed layer (102), said film having composition A'B'O 3 , wherein: A' consists of at least one element from among Li, Na, K, H; B' consists of at least one element from among Nb, Ta, Sb, V; and A' is different from A or B' is different from B

Rapid annealing process for wafers in semiconductor material

Abstract: The invention relates to a surface treatment process for a wafer of material chosen among the semiconductor materials, the wafer having been obtained via a transfer technique, and the process comprising a rapid annealing stage comprising successively; a) a first ramp of temperature rise intended to initiate heating, b) a first stabilization halt intended to stabilize the temperature, c) a second ramp of temperature rise, characterized in that during the second ramp, the average slope of temperature rise has a first value within a first range of temperatures known as low, and then increases within a range of temperatures known as high.

Apparatus for manufacturing semiconductor device

Abstract: PROBLEM TO BE SOLVED: To provide an apparatus for the manufacture of semiconductor device that comprises a bonding module for the molecular bonding of wafers.SOLUTION: The present invention relates to an apparatus for the manufacture of semiconductor devices. The apparatus comprises: a bonding module 1 that has a vacuum chamber to provide bonding of wafers under pressure below atmospheric pressure; and a load-lock module 2 connected to the bonding module 1 and configured for wafer transfer to the bonding module 1, and also connected to a first vacuum pumping device 5. The first vacuum pump is configured to reduce the pressure in the load-lock module 2 to below atmospheric pressure.