Institution
Soitec
Company•Bernin, France•
About: Soitec is a company organization based out in Bernin, France. It is known for research contribution in the topics: Layer (electronics) & Silicon on insulator. The organization has 589 authors who have published 1062 publications receiving 13737 citations. The organization is also known as: Soitec (France).
Papers published on a yearly basis
Papers
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06 May 2016TL;DR: In this article, a method for manufacturing a high-resistivity semiconductor-on-insulator substrate comprising the steps of forming a dielectric layer 2 and a semiconductor layer 3 over a high resistivity substrate was proposed.
Abstract: The invention relates to a method for manufacturing a high-resistivity semiconductor-on-insulator substrate comprising the steps of a) forming a dielectric layer 2 and a semiconductor layer 3 over a high-resistivity substrate 1, such that the dielectric layer 2 is arranged between the high-resistivity substrate 1 and the semiconductor layer 3; b) forming a hard mask or resist 4 over the semiconductor layer 3, wherein the hard mask or resist 4 has at least one opening 5 at a predetermined position; c) forming at least one doped region 7 in the high-resistivity substrate 1 by ion implantation of an impurity element through the at least one opening 5 of the hard mask or resist 4, the semiconductor layer 3 and the dielectric layer 2; d) removing the hard mask or resist 4; and e) forming a radiofrequency, RF, circuit in and/or on the semiconductor layer 3 at least partially overlapping the at least one doped region 7 in the high-resistivity substrate 1.
2 citations
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01 Oct 2017TL;DR: In this paper, a method for determining a suitable implanting energy of at least two atomic species in a donor substrate (30) to create a weakened zone (31) defining a monocrystalline semiconductor layer (32) to be transferred onto a receiver substrate (10) is presented.
Abstract: OF THE DISCLOSURE METHOD FOR DETERMINING A SUITABLE IMPLANTING ENERGY IN A DONOR SUBSTRATE AND PROCESS FOR FABRICATING A STRUCTURE OF SEMICONDUCTOR –ON –INSULATOR TYPE 5 The invention concerns a method for determining a suitable implanting energy of at least two atomic species in a donor substrate (30) to create a weakened zone (31) defining a monocrystalline semiconductor layer (32) to be transferred onto a receiver substrate (10), comprising the following steps: 10 (i) forming a dielectric layer on at least one of the donor substrate (30) and the receiver substrate (10); (ii) co –implanting said species in the donor substrate (30); (iii) bonding the donor substrate (30) on the receiver substrate (10); (iv) detaching the donor substrate (30) along the weakened zone (31) to 15 transfer the monocrystalline semiconductor layer (32) and recover the remainder (34) of the donor substrate; (v) inspecting the peripheral crown of the remainder (34) of the donor substrate, or of the receiver substrate (10) on which the monocrystalline semiconductor layer (32) was transferred at step (iv); 20 (vi) if said crown exhibits zones transferred onto the receiver substrate, determining the fact that the implanting energy at step (ii) is too high; (vii) if said crown does not exhibit zones transferred onto the receiver substrate, determining the fact that the implanting energy at step (ii) is suitable. 25 Fig. 5
2 citations
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11 Oct 2013TL;DR: In this article, a procede comporte les etapes a) fournir un premier substrat (1) comprenant la couche active (10) realisee dans un premier materiau de module d'Young E 1, and d'epaisseur h 1 ; b) fourir un deuxieme substrat(2) realise dans a deux-ieme materiaus de module D'Young et al.
Abstract: Ce procede comporte les etapes a) fournir un premier substrat (1 ) comprenant la couche active (10) realisee dans un premier materiau de module d'Young E 1 , et d'epaisseur h 1 ; b) fournir un deuxieme substrat (2) realise dans un deuxieme materiau de module d'Young E 2 , et d'epaisseur h 2 , c) incurver le premier substrat (1 ) et le deuxieme substrat (2) de sorte qu'ils presentent chacun une forme arquee d'un rayon de courbure R; d) assembler le deuxieme substrat (2) a la couche active (10) de sorte que le deuxieme substrat (2) epouse la forme du premier substrat (1 ); e) retablir la forme initiale au repos du deuxieme substrat (2), le procede etant remarquable en ce que le deuxieme materiau du deuxieme substrat (2) est un materiau souple verifiant la relation E 2 /E 1 < 10 -2 , en ce que l'epaisseur du deuxieme substrat (2) verifie la relation h 2 /h 1 ≥ 10 4 , et en ce que le rayon de courbure verifie la. relation R = h 2 /2e .
2 citations
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09 Mar 2010TL;DR: In this article, a method and structure for a semiconductor device including a thin nitride layer formed between a diamond SOI layer and device silicon layer to block diffusion of ions and improve lifetime of the device silicon is presented.
Abstract: A method and structure for a semiconductor device including a thin nitride layer formed between a diamond SOI layer and device silicon layer to block diffusion of ions and improve lifetime of the device silicon.
2 citations
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27 Oct 2009TL;DR: In this paper, a method and a device for at least locally heating a plate including at least one layer (2) to be at least local heated by a main light flow pulse, and including a priming area (4) located deeply relative to the front surface of said layer to be heated, where the main flow is capable of heating said layer when the temperature of the latter is within a high temperature range.
Abstract: The invention relates to a method and to a device for at least locally heating a plate including at least one layer (2) to be at least locally heated by at least one main light flow pulse, and including at least one priming area (4) located deeply relative to the front surface of said layer to be heated, wherein the main flow (7) is capable of heating said layer to be heated (2) when the temperature of the latter is within a high temperature range (PHT), and a priming a secondary heating means (9) capable of heating said priming region from a temperature within a low temperature range (PBT) up to a temperature within said high temperature range (PHT).
2 citations
Authors
Showing all 590 results
Name | H-index | Papers | Citations |
---|---|---|---|
Michael R. Krames | 65 | 321 | 18448 |
Bich-Yen Nguyen | 47 | 273 | 6557 |
Iuliana Radu | 37 | 237 | 5026 |
George K. Celler | 36 | 233 | 5964 |
Andreas Gombert | 31 | 176 | 3597 |
Fabrice Letertre | 29 | 180 | 2707 |
Bruno Ghyselen | 28 | 175 | 2943 |
Kiyoshi Mitani | 26 | 122 | 1966 |
Bernard Aspar | 25 | 99 | 1910 |
Mariam Sadaka | 25 | 98 | 1780 |
Stefan Degroote | 24 | 93 | 2335 |
Konstantin Bourdelle | 24 | 132 | 2236 |
Joff Derluyn | 23 | 75 | 1877 |
Carlos Mazure | 20 | 151 | 1552 |
Philippe Flatresse | 20 | 73 | 1175 |