Soitec

About: Soitec is a company organization based out in Bernin, France. It is known for research contribution in the topics: Layer (electronics) & Silicon on insulator. The organization has 589 authors who have published 1062 publications receiving 13737 citations. The organization is also known as: Soitec (France).

Rare-Earth Scandate/TiN Gate Stacks in SOI MOSFETs Fabricated With a Full Replacement Gate Process

Abstract: Terbium scandate (TbScO3) and lanthanum scan date (LaScO3) have been investigated as gate dielectrics for metal-oxide-semiconductor field-effect transistors on both silicon-on-insulator (SOI) and strained SOI (sSOI) substrates. X-ray photoelectron spectroscopy analysis revealed the presence of a silicate at the interface for TbScO3 on Si, whereas a silicate/SiO2-like interface was found for the LaScO3 on Si. A full replacement gate process was developed to fabricate high-κ/metal gate fully depleted transistors on SOI and sSOI. LaScO3 transistors with a gate length of 2 μm show excellent characteristics with steep subthreshold slopes of 72 mV/dec, high Ion/Ioff ratios, and electron mobility of 180 cm2/V · s for SOI and 375 cm2/V · s for sSOI at low field, which is superior to corresponding TbScO3 de vices. All sSOI transistors showed 2 times higher electron mobility than SOI reference devices.

Method of bonding two substrates

Abstract: The invention provides a method of bonding two substrates together during which the surfaces of said substrates are brought into contact with each other, comprising at least one step of cleaning the surface of one or both of the substrates to be bonded before their surfaces are brought into contact, characterized in that the cleaning step is carried out so that each cleaned surface is little roughened and in that the bonding is furthermore preceded by heating at least one substrate to be bonded, said heating being initiated before the surfaces of the substrates are brought into contact and extended at least until they have been brought into contact. The invention also relates to a method of forming a structure comprising a thin film of semiconductor material transferred from a donor substrate to a second substrate, the method comprising the co-implantation of two atomic species into the donor substrate so as to create a weakened zone forming the boundary of thin film to be transferred, and the bonding of said substrates together, characterized in that the two atomic species are implanted in such a way that their peaks are offset by less than 200 A in the thickness of the donor substrate, and in that the bonding is carried out by the method described above.

Method for simultaneously obtaining a pair of substrates covered by a useful layer

Abstract: The invention relates to a method for simultaneously obtaining at least one pair of structures (51, 52) each having a useful layer (110, 120) placed on a substrate (71,2). This method is characterized by comprising the following steps consisting of: a) preparing a row structure (1) having a useful layer placed on a supporting substrate (2); b) forming a fragilization area inside said useful layer whereby defining a front useful layer (110) and a rear useful layer (120); c) adhering a stiffening substrate (71) to said front useful layer (110); d) removing the stack of layers along the fragilization area in order to obtain two row structures (2), the first (51) containing the supporting substrate (2) and the rear useful area (120), and the second (52) containing the stiffening substrate (71) and the front useful layer (110). The invention is for use in the fields of electronics, optoelectronics or optics.

Process for fabricating a semiconductor structure employing a temporary bond

Abstract: The invention relates to a process for fabricating a semiconductor that comprises providing a handle substrate comprising a seed substrate and a weakened sacrificial layer covering the seed substrate; joining the handle substrate with a carrier substrate; optionally treating the carrier substrate; detaching the handle substrate at the sacrificial layer to form the semiconductor structure; and removing any residue of the sacrificial layer present on the seed substrate.

A method of polishing a wafer of material

Abstract: The invention relates to a method of polishing a wafer of material, the method implementing at least one step of polishing with an abrasive based on diamond particles in suspension in a solution, wherein the abrasive mixture used implements diamond particles and silica particles with a diamond/silica volume ratio that is controlled to obtain desired roughness for the wafer.