Institution
Soitec
Company•Bernin, France•
About: Soitec is a company organization based out in Bernin, France. It is known for research contribution in the topics: Layer (electronics) & Silicon on insulator. The organization has 589 authors who have published 1062 publications receiving 13737 citations. The organization is also known as: Soitec (France).
Papers published on a yearly basis
Papers
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Patent•
22 Dec 2016TL;DR: In this paper, the authors propose a process for the provision of a chamber suitable for receiving the plurality of structures, circulation of a gas stream in the chamber so that the chamber has a nonoxidizing atmosphere, and heat treatment of the plurality structures at a temperature above a threshold value above which the oxygen present in the oxide of the dielectric diffuses through the active layer reacts with the semiconductor material of active layer and produces a volatile material.
Abstract: A process comprises the following steps: a) provision of a chamber suitable for receiving the plurality of structures, b) circulation of a gas stream in the chamber so that the chamber has a non-oxidizing atmosphere, c) heat treatment of the plurality of structures at a temperature above a threshold value above which the oxygen present in the oxide of the dielectric diffuses through the active layer reacts with the semiconductor material of the active layer and produces a volatile material, the process being noteworthy in that the step b) is carried out so that the gas stream has a rate of circulation between the plurality of structures greater than the rate of diffusion of the volatile material into the gas stream.
Patent•
12 Apr 2013TL;DR: In this paper, a semi-conducteur composed contenant de l'azote (453) permet une energie de bande interdite desiree and a configuration adaptee en reseau par rapport a des substrats d'arseniure de gallium.
Abstract: Un dispositif semi-conducteur, en particulier une cellule solaire (450), est forme sur la base d'une strategie hybride de depot utilisant le MOCVD et la MBE dans le but de fournir des semi-conducteurs composes adaptes en reseau (452, 453, 454). Pour ce faire, la MBE peut etre appliquee pour fournir un semi-conducteur compose contenant de l'azote (453) qui permet une energie de bande interdite desiree et une configuration adaptee en reseau par rapport a des substrats d'arseniure de gallium.
Patent•
20 Jul 2017TL;DR: In this article, a process for smoothing a silicon-on-insulator structure comprising the exposure of a surface of the structure to an inert or reducing gas flow and to a high temperature during a heat treatment is described.
Abstract: A process for smoothing a silicon-on-insulator structure comprising the exposure of a surface of the structure to an inert or reducing gas flow and to a high temperature during a heat treatment includes performing a first heat treatment step at a first temperature and under a first gas flow defined by a first flow rate, and performing a second heat treatment step at a second temperature lower than the first temperature and under a second gas flow defined by a second flow rate lower than the first flow rate.
Patent•
02 Sep 2011
TL;DR: In this article, the authors present a procede for fabrication of a structure multicouche, which is composed of a première plaque and a deuxieme plaque.
Abstract: L'invention concerne un procede d'elimination de fragments de materiau (118) presents sur la surface exposee d'une premiere couche (116) collee sur une deuxieme plaque (110), le procede comprenant une etape consistant a placer la premiere couche (116) dans une solution liquide et a propager dans la solution des ondes ultrasonores. L'invention concerne en outre un procede de fabrication d'une structure multicouche (111) comprenant les etapes successives suivantes : - collage d'une premiere plaque sur une deuxieme plaque de maniere a former une structure multicouche, - recuit de la structure, - amincissement de la premiere plaque comprenant au moins une etape de gravure chimique de la premiere plaque, le procede comprenant en outre, apres l'etape de gravure chimique, l'elimination de fragments de materiau (118) presents sur la surface exposee de la premiere plaque amincie (116).
Patent•
04 Jan 2012
TL;DR: In this paper, a seed structure is placed in a state of compressive strain at room temperature and then placed on a substrate with a non-glassy material to control the strain state.
Abstract: Methods of fabricating semiconductor structures and devices include bonding a seed structure to a substrate using a glass. The seed structure may comprise a crystal of semiconductor material. Thermal treatment of the seed structure bonded to the substrate using the glass may be utilized to control a strain state within the seed structure. The seed structure may be placed in a state of compressive strain at room temperature. The seed structure bonded to the substrate using the glass may be used for growth of semiconductor material, or, in additional methods, a seed structure may be bonded to a first substrate using a glass, thermally treated to control a strain state within the seed structure and a second substrate may be bonded to an opposite side of the seed structure using a non-glassy material.
Authors
Showing all 590 results
| Name | H-index | Papers | Citations |
|---|---|---|---|
| Michael R. Krames | 65 | 321 | 18448 |
| Bich-Yen Nguyen | 47 | 273 | 6557 |
| Iuliana Radu | 37 | 237 | 5026 |
| George K. Celler | 36 | 233 | 5964 |
| Andreas Gombert | 31 | 176 | 3597 |
| Fabrice Letertre | 29 | 180 | 2707 |
| Bruno Ghyselen | 28 | 175 | 2943 |
| Kiyoshi Mitani | 26 | 122 | 1966 |
| Bernard Aspar | 25 | 99 | 1910 |
| Mariam Sadaka | 25 | 98 | 1780 |
| Stefan Degroote | 24 | 93 | 2335 |
| Konstantin Bourdelle | 24 | 132 | 2236 |
| Joff Derluyn | 23 | 75 | 1877 |
| Carlos Mazure | 20 | 151 | 1552 |
| Philippe Flatresse | 20 | 73 | 1175 |