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Institution

Soitec

CompanyBernin, France
About: Soitec is a company organization based out in Bernin, France. It is known for research contribution in the topics: Layer (electronics) & Silicon on insulator. The organization has 589 authors who have published 1062 publications receiving 13737 citations. The organization is also known as: Soitec (France).


Papers
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Patent
Hacene Lahreche1
22 Sep 2009
TL;DR: In this article, an electronic device successively comprising from its base to its surface: (a) a support layer, (b) a channel layer adapted to contain an electron gas, (c) a barrier layer and (d) at least one ohmic contact electrode formed by a superposition of metallic layers, a first layer of which is in contact with the barrier layer.
Abstract: In one embodiment, the disclosure relates to an electronic device successively comprising from its base to its surface: (a) a support layer, (b) a channel layer adapted to contain an electron gas, (c) a barrier layer and (d) at least one ohmic contact electrode formed by a superposition of metallic layers, a first layer of which is in contact with the barrier layer. The device is remarkable in that the barrier layer includes a contact region under the ohmic contact electrode(s). The contact region includes at least one metal selected from the metals forming the superposition of metallic layers. Furthermore, a local alloying binds the contact region and the first layer of the electrode(s).

41 citations

Proceedings ArticleDOI
07 Jun 2009
TL;DR: In this paper, a BCB-based multilayer interconnect process was used to interconnect the InP HBT and Si CMOS to create a differential amplifier demonstration circuit, which serves as the building block for high speed, low power dissipation mixed signal circuits such as ADCs and DACs.
Abstract: We present results on the direct monolithic integration of III–V devices and Si CMOS on a silicon substrate. InP HBTs (0.5 × 5 um2 emitter) with ft and fmax ≫ 200GHz were grown directly in windows adjacent to CMOS transistors on silicon template wafers or SOLES (Silicon on Lattices Engineered Substrates). A BCB based multilayer interconnect process was used to interconnect the InP HBT and Si CMOS to create a differential amplifier demonstration circuit. The heterogeneously integrated differential amplifier serves as the building block for high speed, low power dissipation mixed signal circuits such as ADCs and DACs.

41 citations

Patent
Chantal Arena1
13 Nov 2009
TL;DR: In this paper, an intermediate epitaxial layer is grown on an initial surface so that growth pits form at surface dislocations present in the initial surface, and a following layer is then grown on the intermediate layer according to the known phenomena of epitaxia lateral overgrowth so it extends laterally and encloses at least the agglomerations of intersecting growth pits.
Abstract: Methods which can be applied during the epitaxial growth of semiconductor structures and layers of III-nitride materials so that the qualities of successive layers are successively improved. An intermediate epitaxial layer is grown on an initial surface so that growth pits form at surface dislocations present in the initial surface. A following layer is then grown on the intermediate layer according to the known phenomena of epitaxial lateral overgrowth so it extends laterally and encloses at least the agglomerations of intersecting growth pits. Preferably, prior to growing the following layer, a discontinuous film of a dielectric material is deposited so that the dielectric material deposits discontinuously so as to reduce the number of dislocations in the laterally growing material. The methods of the invention can be performed multiple times to the same structure. Also, semiconductor structures fabricated by these methods.

40 citations

Patent
Didier Landru1, Capello Luciana1, Desbonnets Eric1, Christophe Figuet1, Oleg Kononchuk1 
16 Nov 2011
TL;DR: In this paper, an electronic device for radio frequency or power applications, comprising a semiconductor layer supporting electronic components on a support substrate, wherein the support substrate(1) comprises a base layer (12, 14) having a thermal conductivity of at least 30 W/m K and a superficial layer (13, 4) having at least 5 µm, said superficial layer having an electrical resistivity at least 3000 Ohm.
Abstract: The invention relates to an electronic device for radio frequency or power applications, comprising a semiconductor layer supporting electronic components on a support substrate, wherein the support substrate(1) comprises a base layer (12) having a thermal conductivity of at least 30 W/m K and a superficial layer (13, 4) having a thickness of at least 5 µm, said superficial layer (13, 14) having an electrical resistivity of at least 3000 Ohm.cm and a thermal conductivity of at least 30 W/m K. The invention also relates to two processes for manufacturing such a device.

38 citations

Journal ArticleDOI
27 Apr 2010-ACS Nano
TL;DR: The measured dependence of the sub-band splitting and the shift of their weighted average on degree of confinement is in excellent agreement with theory, for both Si(001) and Si(110).
Abstract: We report direct measurements of changes in the conduction-band structure of ultrathin silicon nanomembranes with quantum confinement. Confinement lifts the 6-fold-degeneracy of the bulk-silicon conduction-band minimum (CBM), Δ, and two inequivalent sub-band ladders, Δ2 and Δ4, form. We show that even very small surface roughness smears the nominally steplike features in the density of states (DOS) due to these sub-bands. We obtain the energy splitting between Δ2 and Δ4 and their shift with respect to the bulk value directly from the 2p3/2→Δ transition in X-ray absorption. The measured dependence of the sub-band splitting and the shift of their weighted average on degree of confinement is in excellent agreement with theory, for both Si(001) and Si(110).

37 citations


Authors

Showing all 590 results

NameH-indexPapersCitations
Michael R. Krames6532118448
Bich-Yen Nguyen472736557
Iuliana Radu372375026
George K. Celler362335964
Andreas Gombert311763597
Fabrice Letertre291802707
Bruno Ghyselen281752943
Kiyoshi Mitani261221966
Bernard Aspar25991910
Mariam Sadaka25981780
Stefan Degroote24932335
Konstantin Bourdelle241322236
Joff Derluyn23751877
Carlos Mazure201511552
Philippe Flatresse20731175
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Performance
Metrics
No. of papers from the Institution in previous years
YearPapers
20231
20221
202123
202029
201933
201833