Soitec

About: Soitec is a company organization based out in Bernin, France. It is known for research contribution in the topics: Layer (electronics) & Silicon on insulator. The organization has 589 authors who have published 1062 publications receiving 13737 citations. The organization is also known as: Soitec (France).

Method for manufacturing a semiconductor substrate

Abstract: The invention relates to a method for manufacturing a semiconductor substrate, in particular a semiconductor-on-insulator substrate, comprising the steps of a) providing a donor substrate and a handle substrate, b) forming a pattern of one or more doped regions in, in particular inside, the handle substrate, and then c) attaching, in particular by bonding, the donor and the handle substrate to obtain a donor-handle compound.

Realization and characterization of thin single crystal Ge films on sapphire

Abstract: We have successfully produced and characterized thin single crystal Ge films on sapphire substrates (GeOS). Such a GeOS template offers a cost-effective alternative to bulk germanium substrates for applications where only a thin (<2 ?m) Ge layer is needed for device operation. The GeOS templates have been realized using the Smart CutTM?technique. 100?mm diameter GeOS templates have been manufactured and characterized to compare the Ge thin film properties with bulk Ge. Surface defect inspection, SEM, AFM, defect etching, XRD and Raman spectroscopy were all performed. The results obtained for each characterization technique used have highlighted that the material properties of the transferred thin Ge film were very close to the ones of a bulk Ge reference. An epitaxial AlGaInP/GaInP/AlGaInP double heterostructure was grown atop the GeOS template to demonstrate the template's stability under the conditions encountered in typical device realization. The photoluminescent behavior of this epitaxial structure was nearly identical to that of a similar structure grown on a bulk Ge substrate. The GeOS templates therefore offer a viable alternative to bulk Ge substrates in the fabrication of devices whose operation is compatible with a thin film structure.

Evaluation of FinFET RF Building Blocks

Abstract: In this paper we present for the first time essential building blocks for RF circuits in an advanced FinFET technology. Voltage controlled oscillators (VCOs) and a low noise amplifier (LNA) have been realized.

New SiC on Insulator Wafers Based on the Smart-Cut® Approach and their Potential Applications

Abstract: Important progress have been made in the fabrication of SiCOI (Silicon Carbide On Insulator) structures using the Smart-Cut® approach. The different structures which have been demonstrated both in terms of transferred layer polytypes (4H and 6H), of handle substrate (Silicon or Polycrystalline Silicon carbide) and of buried insulator layers (Silicon Dioxide and Silicon Nitride) will be described. Deep traps present in the SiC layer after transfer and annealing of the structure and which are generated by the ion implantation process has been studied using different techniques (Hall measurements, DLTS, Photoluminsecence, RPE). We will see that their density can be strongly minimised making the as transferred layer quality compatible with many applications. Considering both the improved layer quality and the different possible SiCOI structures now available the different possible applications and the perspectives will be reviewed.