Institution
Soitec
Company•Bernin, France•
About: Soitec is a company organization based out in Bernin, France. It is known for research contribution in the topics: Layer (electronics) & Silicon on insulator. The organization has 589 authors who have published 1062 publications receiving 13737 citations. The organization is also known as: Soitec (France).
Papers published on a yearly basis
Papers
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27 Apr 2015TL;DR: The value of using RF-SOI substrates and more especially the new generation of Soitec widely adopted eSI™ (enhanced Signal Integrity) substrate to achieve the RF IC performance requested to address the LTE Advanced smart phone market is explained.
Abstract: The increasing demand for wireless data bandwidth and the rapid adoption of LTE and LTE Advanced standards push radio-frequency (RF) IC designers to develop devices with higher levels of integrated RF functions, meeting more and more stringent specification levels. The substrates on which those devices are manufactured play a major role in achieving that level of performance [1]. In this paper, Soitec and UCL explain the value of using RF-SOI substrates and more especially the new generation of Soitec widely adopted eSI™ (enhanced Signal Integrity) substrate to achieve the RF IC performance requested to address the LTE Advanced smart phone market.
3 citations
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23 Nov 2015TL;DR: In this article, the authors assessed SOI buried oxide (BOX) electrical quality through charge to breakdown, Breakdown Voltage, low field leakage, BOX fixed charge density and BOX/Si interface trap density measurements.
Abstract: SOI Buried Oxide (BOX) electrical quality is assessed through Charge to Breakdown, Breakdown Voltage, low field leakage, BOX fixed charge density and BOX/Si interface trap density measurements. Breakdown electrical field higher than 10 MV.cm−1 and 10 years lifetime at operating voltages in excess of 16V are reported on thin BOX layers.
3 citations
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06 Nov 2009TL;DR: In this paper, deep amorphization of SOI substrate that preserves a crystalline surface layer was demonstrated on (110) and (100) oriented SOI films, where the crystalline integrity of the surface layer allowed it to be a template for solid phase epitaxy.
Abstract: Deep amorphization of SOI substrate that preserves a crystalline surface layer was demonstrated on (110) and (100) oriented SOI films. The crystalline integrity of the surface layer allowed it to be a template for solid phase epitaxy. At an optimized temperature, pseudo-MOSFET measurements indicate a complete recovery of the electronic properties. However, a small increase is observed for the density of interface states. These results demonstrate the feasibility of this approach to form hybrid (100)/(110) SOI films that would allow increasing the hole mobility.
3 citations
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TL;DR: In this article, a theoretical protocol for the reconstruction of extrinsic and intrinsic strain tensors in single-crystals attached to a template, with an arbitrary oriented coordinate system, is presented.
Abstract: In the context of growing interest in strain engineering, we present a theoretical protocol for the reconstruction of extrinsic and intrinsic strain tensors in single-crystals attached to a template, with an arbitrary oriented coordinate system. Input data for the protocol are extrinsic deformations of lattice planes, i.e., measured with reference to a template. By combining the protocol with elasticity theory, material property modification can be elucidated. Different methods for strain measurements can take advantage of this approach. It has been applied for reconstruction of strain tensor depth distribution in off-axis LiTaO3 crystals implanted with H+ ions, which is the key step for piezoelectric thin film-on-insulator fabrication by the Smart Cut process. Modifications of composition, lattice parameters, and elastic constants are indicated and discussed.
3 citations
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TL;DR: In this paper, the RF losses and nonlinearities of the commercially available Soitec radio frequency enhanced signal integrity (RFeSI) high-resistivity silicon-on-insulator substrates are investigated through investigation of 50-Omega $ coplanar waveguide lines manufactured on them.
Abstract: RF losses and nonlinearities of the commercially available Soitec radio frequency enhanced signal integrity (RFeSI) high-resistivity silicon-on-insulator substrates are investigated through investigation of 50- $\Omega $ coplanar waveguide lines manufactured on them. It is shown that the losses of the RFeSI substrates are very small. They have a temperature minimum value at around 70 °C. The generated second- and third-harmonic powers, due to the nonlinearities of the substrates, also have a similar temperature minimum value. The results indicate that the RFeSI substrates present a good RF performance over a temperature range from 0 °C to 115 °C. The RF performance of the two generations of RFeSI substrates is also compared. The losses of the two RFeSI substrates remain the same over the explored temperature range, whereas the harmonic performance of generation 2 (RFeSI 90) is better than that of generation 1 (RFeSI 80). This stems from the increased effective resistivity.
3 citations
Authors
Showing all 590 results
Name | H-index | Papers | Citations |
---|---|---|---|
Michael R. Krames | 65 | 321 | 18448 |
Bich-Yen Nguyen | 47 | 273 | 6557 |
Iuliana Radu | 37 | 237 | 5026 |
George K. Celler | 36 | 233 | 5964 |
Andreas Gombert | 31 | 176 | 3597 |
Fabrice Letertre | 29 | 180 | 2707 |
Bruno Ghyselen | 28 | 175 | 2943 |
Kiyoshi Mitani | 26 | 122 | 1966 |
Bernard Aspar | 25 | 99 | 1910 |
Mariam Sadaka | 25 | 98 | 1780 |
Stefan Degroote | 24 | 93 | 2335 |
Konstantin Bourdelle | 24 | 132 | 2236 |
Joff Derluyn | 23 | 75 | 1877 |
Carlos Mazure | 20 | 151 | 1552 |
Philippe Flatresse | 20 | 73 | 1175 |