Institution
Soitec
Company•Bernin, France•
About: Soitec is a company organization based out in Bernin, France. It is known for research contribution in the topics: Layer (electronics) & Silicon on insulator. The organization has 589 authors who have published 1062 publications receiving 13737 citations. The organization is also known as: Soitec (France).
Papers published on a yearly basis
Papers
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04 Sep 2020TL;DR: In this paper, a design process is used for designing a device comprising a plurality of micro-machined elements, each comprising a flexible membrane, the elements being arranged in a plane in a determined topology.
Abstract: A design process is used for designing a device comprising a plurality of micro-machined elements, each comprising a flexible membrane, the elements being arranged in a plane in a determined topology. The design process comprises a step of defining the determined topology so that it has a character compatible with a generic substrate having cavities, the characteristics of which are pre-established. Each flexible membrane of the micro-machined elements is associated with one cavity of the generic substrate. The present disclosure also relates to a fabrication process for fabricating a device comprising a plurality of micro-machined elements, and to this device itself, wherein only some of the pairs of cavities and flexible membranes are configured to form a set of functional micro-machined elements.
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05 Oct 1998TL;DR: In this paper, both physical and chemical characterization of Unibond/sup R/SOI material buried oxide (BOX) has been investigated, monitored by IR analysis, electrical and physical measurements.
Abstract: Summary form only given. Hydrogen irradiation of solids can induce cavities in their volume, leading to blistering and flaking phenomena upon the surface. By combining this microcavity formation with wafer bonding technologies, this physical phenomenon has been successfully optimized to obtain a Smart-Cut/sup R/ (in-depth splitting) of a thin silicon on oxide layer and applied to Unibond/sup R/ SOI wafer fabrication (Bruel, 1995). In this case, the wafer bonding step is realized by contacting an implanted oxidized wafer and a bare silicon wafer with a 10 /spl Aring/ native oxide. This paper deals with both physical and chemical characterization of Unibond/sup R/ SOI material buried oxide (BOX). We have focused on oxide properties evolution during processing, monitored by IR analysis, electrical and physical measurements.
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28 Mar 2003TL;DR: In this article, a polishing machine with a non-rotating part and a non rotating part is described, where the abrasive distribution mechanism abrasive source is fed into the ring and there are distribution holes.
Abstract: The polishing machine has a polishing plane (1) driving a rotation movement. There is a polishing head (4) with a non rotating part (40,41) and a polishing slab. There is an abrasive distribution mechanism abrasive source. A fixing (420) provides attachment to the non rotating part. The abrasive is fed (51) into the ring and there are distribution holes.
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17 Jun 2014TL;DR: In this paper, a process for the manufacture of a composite structure includes the following stages: a) providing a donor substrate comprising a first surface and a support substrate; b) forming a zone of weakening in the donor substrate.
Abstract: A process for the manufacture of a composite structure includes the following stages: a) providing a donor substrate comprising a first surface and a support substrate; b) forming a zone of weakening in the donor substrate, the zone of weakening delimiting, with the first surface of the donor substrate, a working layer; c) assembling the support substrate and the donor substrate; d) fracturing the donor substrate along the zone of weakening; and e) thinning the working layer so as to form a thinned working layer. Stage b) is carried out so that the working layer exhibits a thickness profile appropriate for compensating for the nonuniformity in consumption of the working layer during stage e).
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23 Dec 2011TL;DR: In this paper, the number of Group V ions formed from Group V precursors in methods of forming III-V semiconductor materials to enhance the growth rate of the semiconductor material.
Abstract: Methods and systems are increase the number of Group V ions formed from Group V precursors in methods of forming III-V semiconductor materials to enhance the growth rate of the III-V semiconductor material. In some embodiments, a Group V precursor is heated and at least partially decomposed in a heated diffuser to form Group V ions. In additional embodiments, microwave energy is applied to a Group V precursor and the Group V precursor is at least partially decomposed to form Group V ions. Group III ions are also formed, and the Group III and Group V ions are used to form a III-V semiconductor material within a chamber.
Authors
Showing all 590 results
Name | H-index | Papers | Citations |
---|---|---|---|
Michael R. Krames | 65 | 321 | 18448 |
Bich-Yen Nguyen | 47 | 273 | 6557 |
Iuliana Radu | 37 | 237 | 5026 |
George K. Celler | 36 | 233 | 5964 |
Andreas Gombert | 31 | 176 | 3597 |
Fabrice Letertre | 29 | 180 | 2707 |
Bruno Ghyselen | 28 | 175 | 2943 |
Kiyoshi Mitani | 26 | 122 | 1966 |
Bernard Aspar | 25 | 99 | 1910 |
Mariam Sadaka | 25 | 98 | 1780 |
Stefan Degroote | 24 | 93 | 2335 |
Konstantin Bourdelle | 24 | 132 | 2236 |
Joff Derluyn | 23 | 75 | 1877 |
Carlos Mazure | 20 | 151 | 1552 |
Philippe Flatresse | 20 | 73 | 1175 |