Institution
Soitec
Company•Bernin, France•
About: Soitec is a company organization based out in Bernin, France. It is known for research contribution in the topics: Layer (electronics) & Silicon on insulator. The organization has 589 authors who have published 1062 publications receiving 13737 citations. The organization is also known as: Soitec (France).
Papers published on a yearly basis
Papers
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6 citations
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13 Dec 2012TL;DR: In this paper, a process for stabilizing a bonding interface, located within a structure for applications in the fields of electronics, optics and/or optoelectronics and that comprises an oxide layer buried between an active layer and a receiver substrate, the bonding interface having been obtained by molecular adhesion.
Abstract: The invention relates to a process for stabilizing a bonding interface, located within a structure for applications in the fields of electronics, optics and/or optoelectronics and that comprises an oxide layer buried between an active layer and a receiver substrate, the bonding interface having been obtained by molecular adhesion. In accordance with the invention, the process further comprises irradiating this structure with a light energy flux provided by a laser, so that the flux, directed toward the structure, is absorbed by the energy conversion layer and converted to heat in this layer, and in that this heat diffuses into the structure toward the bonding interface, so as to thus stabilize the bonding interface.
6 citations
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TL;DR: In this paper, the authors studied the direct bonding of platinum to silicon for applications where an electrical conduction through the bonding interface is desired, and showed that levels of surface roughness compatible with direct bonding have been achieved for the deposited Pt thin films.
Abstract: We have studied the direct bonding of platinum to silicon for applications where an electrical conduction through the bonding interface is desired. Platinum has been deposited on silicon wafers by mean of physical vapor deposition. Levels of surface roughness compatible with direct bonding have been achieved for the deposited Pt thin films. The surface preparation of the Pt films was performed using a diluted HF or H 2 SO 4 based chemistry. The sequence used allowed achieving the direct bonding of Pt to Si. The post bonding thermal treatments have been investigated. Such thermal treatments lead to the silicidation of the platinum layer. Adhesion between the wafers after the thermal treatments has been strengthened as measured by Maszara's blade technique (440 mJ/cm 2 were achieved after a 300°C thermal treatment). The morphological evolution of the buried silicide layer has been followed for different thermal budget by scanning electron microscopy. The higher thermal budgets probed (i.e., 700°C, 1 h) resulted in the agglomeration of the buried silicide layer, but without observing debonding of the two silicon wafers. The vertical electrical conduction has been measured for the final sample annealed at 300°C. Schottky type contacts have been obtained between the semiconductor and the silicide.
6 citations
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11 Feb 2013TL;DR: In this paper, a look-up table and a FPGA based on the multiplexer are presented. But the look-ups are based on a lookup table.
Abstract: The present invention relates to a multiplexer (1000) comprising at least a first input (1051), and a second input (1052, 1053, 1054); and one output (1041), connected to the first input via a first pass gate (1031) and to the second input via a second pass gate (1032, 1033, 1034), wherein the first pass gate comprises at least a first double-gate transistor, and the second pass gate comprises at least a second double-gate transistor, and each of the first and second double gate transistor has a first gate (1031 A, 1032A, 1033A, 1034A) controlled based on a first control signal (A) and a second gate (1031 B, 1032B, 1033B, 1034B) controlled based on a second control signal (B) The invention further relates to a look-up table and a FPGA based on the multiplexer
6 citations
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TL;DR: In this article, the authors investigated the carrier dynamics in highly excited GaN/Si heterostructures by means of time-resolved picosecond four-wave mixing (FWM), carrier lifetimes at high excitation energy densities being about 50-150 ps were estimated.
Abstract: Carrier dynamics in highly excited GaN/Si heterostructures have been investigated by means of time-resolved picosecond four-wave mixing (FWM), carrier lifetimes at high excitation energy densities being about 50-150 ps were estimated. The excitation energy density corresponding to the saturation of the FWM diffraction efficiency is correlated with the values of laser thresholds in the investigated samples, whereas the carrier lifetimes and the value of the FWM diffraction efficiency show an agreement with the photoluminescence (PL) intensity below the threshold. This study allowed to clarify the observed laser threshold behaviour of the investigated samples by a difference in carrier lifetimes resulting in a difference of the excited volume of the epitaxial layers. (© 2005 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)
6 citations
Authors
Showing all 590 results
Name | H-index | Papers | Citations |
---|---|---|---|
Michael R. Krames | 65 | 321 | 18448 |
Bich-Yen Nguyen | 47 | 273 | 6557 |
Iuliana Radu | 37 | 237 | 5026 |
George K. Celler | 36 | 233 | 5964 |
Andreas Gombert | 31 | 176 | 3597 |
Fabrice Letertre | 29 | 180 | 2707 |
Bruno Ghyselen | 28 | 175 | 2943 |
Kiyoshi Mitani | 26 | 122 | 1966 |
Bernard Aspar | 25 | 99 | 1910 |
Mariam Sadaka | 25 | 98 | 1780 |
Stefan Degroote | 24 | 93 | 2335 |
Konstantin Bourdelle | 24 | 132 | 2236 |
Joff Derluyn | 23 | 75 | 1877 |
Carlos Mazure | 20 | 151 | 1552 |
Philippe Flatresse | 20 | 73 | 1175 |