Patent
System comprising a semiconductor device and structure
Zvi Or-Bach,Brian Cronquist,Israel Beinglass,Jan Lodewijk de Jong,Deepak C. Sekar,Zeev Wurman +5 more
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TLDR
In this article, a system includes a semiconductor device consisting of a first single crystal silicon layer comprising first transistors, first alignment marks, and at least one metal layer overlying the first single-crystalline silicon layer.Abstract:
A system includes a semiconductor device. The semiconductor device includes a first single crystal silicon layer comprising first transistors, first alignment marks, and at least one metal layer overlying the first single crystal silicon layer, wherein the at least one metal layer comprises copper or aluminum more than other materials; and a second single crystal silicon layer overlying the at least one metal layer. The second single crystal silicon layer comprises a plurality of second transistors arranged in substantially parallel bands. Each of a plurality of the bands comprises a portion of the second transistors along an axis in a repeating pattern.read more
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Patent
Semiconductor device and structure
Zvi Or-Bach,Brian Cronquist +1 more
TL;DR: In this paper, a first layer and a second layer of layer-transferred mono-crystallized silicon, where the first layer comprises a first plurality of horizontally-oriented transistors, and the second layer includes a second plurality of vertically oriented transistors.
Patent
Method for fabrication of a semiconductor device and structure
TL;DR: In this article, a method to process an Integrated Circuit device including processing a first layer of first transistors, then processing a metal layer overlaying the first layer and providing at least one connection to the first Transistors, and finally processing a second layer of second transistors overlaying a first metal layer, wherein the second metal layer is connected to provide power to at least 1 of the second Transistors.
Patent
Semiconductor devices and methods of manufacturing the same
TL;DR: In this article, a gate pattern and a source/drain region are formed at both sides of the gate pattern, and the first insulation layer pattern having an exposed portion of the source/drain region, forming a silicide layer on the exposed source and drain region, and forming a second insulation layer covering the entire surface of the substrate.
Patent
3D semiconductor device and structure
TL;DR: In this article, an Integrated Circuit device including a first layer including first single crystal transistors; a second layer overlaying the first layer, the second layer including second single-crystal transistors, where the second-layer thickness is less than one micron, where a plurality of the first transistors is circumscribed by a first dice lane of at least 10 microns width, and there are no first conductive connections to the plurality of transistors that cross the first-dice lane.
Patent
Semiconductor structure and method for manufacturing the same
TL;DR: In this article, a method for manufacturing a semiconductor structure, comprising of a mask layer to cover the metal interconnect liners and forming openings, which expose the metal internals on the mask layer, is presented.
References
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Patent
Method and apparatus for distributing an optical clock in an integrated circuit
TL;DR: In this paper, a method and an apparatus for optically clocking an integrated circuit in a semiconductor is presented, where the laser pulses are separated into a plurality of split laser pulses, each of which are focused through the back side of a C4 packaged integrated circuit die into P-N junctions distributed throughout the integrated circuit.
Patent
Signal delivery in stacked device
TL;DR: In this paper, the authors describe a system that has a base, a first die, a second die, and a second arranged in a stacked with the first die and the base and a structure located in the stack and outside at least one of the first and second dice.
Patent
Integrated circuit device, system, and method of fabrication
TL;DR: In this article, a semiconductor device consisting of a first semiconductor portion (32) having a first end (34), a second end (36), and a slit portion (30), where the width of the slit portion is less than the width at least one of the first end and the second end.
Journal ArticleDOI
Single-crystalline silicon micromirrors actuated by self-aligned vertical electrostatic combdrives with piston-motion and rotation capability
TL;DR: In this article, a self-aligned, high aspect ratio, vertical electrostatic combdrives with multi-level electrical isolation that allows bi-directional and dual-mode operation is presented.
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Monolitholic LED chip to emit multiple colors
TL;DR: In this paper, a light emitting diode chip with red, green and blue light emission regions on a single substrate is presented, where each region can be powered selectively to emit one color light at a time.