Patent
System comprising a semiconductor device and structure
Zvi Or-Bach,Brian Cronquist,Israel Beinglass,Jan Lodewijk de Jong,Deepak C. Sekar,Zeev Wurman +5 more
Reads0
Chats0
TLDR
In this article, a system includes a semiconductor device consisting of a first single crystal silicon layer comprising first transistors, first alignment marks, and at least one metal layer overlying the first single-crystalline silicon layer.Abstract:
A system includes a semiconductor device. The semiconductor device includes a first single crystal silicon layer comprising first transistors, first alignment marks, and at least one metal layer overlying the first single crystal silicon layer, wherein the at least one metal layer comprises copper or aluminum more than other materials; and a second single crystal silicon layer overlying the at least one metal layer. The second single crystal silicon layer comprises a plurality of second transistors arranged in substantially parallel bands. Each of a plurality of the bands comprises a portion of the second transistors along an axis in a repeating pattern.read more
Citations
More filters
Patent
Integrated circuit and computer-implemented method for designing an integrated circuit
TL;DR: In this article, an integrated circuit with a substrate having a first cell region and a second cell region is presented. But the method is not computer-implemented and it is not suitable for the use of a single-input single-output (SIMO) circuit.
Patent
Built-in self test for silicon photonics device
TL;DR: In this article, the authors present an integrated system on chip device with a self-test block configured on the silicon photonics device and to be operable during a test operation, the self test block comprising a broad band source configured to emit electromagnetic radiation from 1200 to 1400 nm or 1500 to 1600 nm to a multiplexer device.
Patent
Magnetic memory cells, methods of fabrication, semiconductor devices, memory systems, and electronic systems
Gurtej S. Sandhu,Witold Kula +1 more
TL;DR: In this paper, a getter material proximate to the secondary oxide region is formulated and configured to remove oxygen from the SOP, reducing an oxygen concentration and an electrical resistance of the secondary SOP.
Patent
Power gate placement techniques in three-dimensional (3D) integrated circuits (ICs) (3DICs)
TL;DR: In this article, power gate placement techniques in 3D integrated circuits (ICs) (3DICs), are disclosed, where the power gating circuits are consolidated in a tier closest to a voltage source, which allows a distance between the voltage source and the power gate circuits to be minimized.
Patent
Method for thin die-to-wafer bonding
Daniel Pascual,Jeremiah Hebding,Megha Rao,Colin McDonough,Douglas D. Coolbaugh,Joseph Piccirillo,Michael Liehr +6 more
TL;DR: In this article, a method for bonding a die to a base technology wafer is described, which includes: providing a device wafer having a front, back, at least one side, and at least 1 TSV, wherein the back contains a substrate material.
References
More filters
Book
Digital Systems Testing and Testable Design
TL;DR: The new edition of Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems offers comprehensive and state-ofthe-art treatment of both testing and testable design.
Journal ArticleDOI
Nanowire transistors without junctions
Jean-Pierre Colinge,Chi-Woo Lee,Aryan Afzalian,Aryan Afzalian,Nima Dehdashti Akhavan,Ran Yan,Isabelle Ferain,Pedram Razavi,B. O'Neill,Alan Blake,Mary White,Anne-Marie Kelleher,Brendan McCarthy,Richard Murphy +13 more
TL;DR: A new type of transistor in which there are no junctions and no doping concentration gradients is proposed and demonstrated, which has near-ideal subthreshold slope, extremely low leakage currents, and less degradation of mobility with gate voltage and temperature than classical transistors.
Journal ArticleDOI
Designing reliable systems from unreliable components: the challenges of transistor variability and degradation
TL;DR: This article discusses effects of variability in transistor performance and proposes microarchitecture, circuit, and testing research that focuses on designing with many unreliable components (transistors) to yield reliable system designs.
Patent
Three dimensional structure memory
TL;DR: The 3Dimensional Structure (3DS) Memory (100) as mentioned in this paper is a three-dimensional structure (3D) memory that allows physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized.
Patent
Transparent contacts for organic devices
TL;DR: In this paper, a multicolor organic light emitting device employs vertically stacked layers of double heterostructure devices which are fabricated from organic compounds, and the devices are configured as stacked to provide a staircase profile whereby each device is separated from the other by a thin transparent conductive contact layer to enable light emanating from each of the devices to pass through the semitransparent contacts and through the lower device structures.