Patent
System comprising a semiconductor device and structure
Zvi Or-Bach,Brian Cronquist,Israel Beinglass,Jan Lodewijk de Jong,Deepak C. Sekar,Zeev Wurman +5 more
Reads0
Chats0
TLDR
In this article, a system includes a semiconductor device consisting of a first single crystal silicon layer comprising first transistors, first alignment marks, and at least one metal layer overlying the first single-crystalline silicon layer.Abstract:
A system includes a semiconductor device. The semiconductor device includes a first single crystal silicon layer comprising first transistors, first alignment marks, and at least one metal layer overlying the first single crystal silicon layer, wherein the at least one metal layer comprises copper or aluminum more than other materials; and a second single crystal silicon layer overlying the at least one metal layer. The second single crystal silicon layer comprises a plurality of second transistors arranged in substantially parallel bands. Each of a plurality of the bands comprises a portion of the second transistors along an axis in a repeating pattern.read more
Citations
More filters
Patent
Semiconductor device and structure
Zvi Or-Bach,Brian Cronquist +1 more
TL;DR: In this paper, a first layer and a second layer of layer-transferred mono-crystallized silicon, where the first layer comprises a first plurality of horizontally-oriented transistors, and the second layer includes a second plurality of vertically oriented transistors.
Patent
Method for fabrication of a semiconductor device and structure
TL;DR: In this article, a method to process an Integrated Circuit device including processing a first layer of first transistors, then processing a metal layer overlaying the first layer and providing at least one connection to the first Transistors, and finally processing a second layer of second transistors overlaying a first metal layer, wherein the second metal layer is connected to provide power to at least 1 of the second Transistors.
Patent
Semiconductor devices and methods of manufacturing the same
TL;DR: In this article, a gate pattern and a source/drain region are formed at both sides of the gate pattern, and the first insulation layer pattern having an exposed portion of the source/drain region, forming a silicide layer on the exposed source and drain region, and forming a second insulation layer covering the entire surface of the substrate.
Patent
3D semiconductor device and structure
TL;DR: In this article, an Integrated Circuit device including a first layer including first single crystal transistors; a second layer overlaying the first layer, the second layer including second single-crystal transistors, where the second-layer thickness is less than one micron, where a plurality of the first transistors is circumscribed by a first dice lane of at least 10 microns width, and there are no first conductive connections to the plurality of transistors that cross the first-dice lane.
Patent
Semiconductor structure and method for manufacturing the same
TL;DR: In this article, a method for manufacturing a semiconductor structure, comprising of a mask layer to cover the metal interconnect liners and forming openings, which expose the metal internals on the mask layer, is presented.
References
More filters
Patent
Semiconductor wafer having a separation portion on a peripheral area
TL;DR: In this article, a conveyance system for a semiconductor wafer can be used without any change before and after a support plate is adhered to the wafer, thus improving the manufacturing efficiency.
Journal Article
Hydrogen Ion Implantation Mechanism in GaAs-on-insulator Wafer Formation by Ion-cut Process
TL;DR: The GaAs-on-insulator (GOI) wafer fabrication technique has been developed by using ion-cut process, based on hydrogen ion implantation and wafer direct bonding techniques, and the optimum conditions for achieving blistering/splitting only after post-implantation annealing were determined.
Patent
Integrated circuit chip with FETs having mixed body thicknesses and method of manufacture thereof
TL;DR: In this article, the authors describe an IC chip that may be a bulk CMOS IC chip with silicon on insulator (SOI) Field Effect Transistors (FETs) and method of making the chip.
Patent
Circuit board for direct flip chip attachment
Boris Kolodin,James Reginelli +1 more
TL;DR: In this article, a circuit board is formed by forming a substantially continuous conductive layer on an insulating board and removing selected portions of the continuous conductivity layer to define an electrically conductive trace; laser cutting the trace to define sub-traces electrically isolated from each other by a laser cut gap formed by the laser cutting; and bonding a light emitting diode (LED) chip to the circuit board across or adjacent to the laser-cut gap.
Patent
Methods of forming capacitors DRAM arrays, and monolithic integrated circuits
TL;DR: In this article, a method of forming a capacitor comprising of a mass of silicon material over a node location, the mass comprising exposed doped silicon and exposed undoped silicon, was presented.