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Patent

System comprising a semiconductor device and structure

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TLDR
In this article, a system includes a semiconductor device consisting of a first single crystal silicon layer comprising first transistors, first alignment marks, and at least one metal layer overlying the first single-crystalline silicon layer.
Abstract
A system includes a semiconductor device. The semiconductor device includes a first single crystal silicon layer comprising first transistors, first alignment marks, and at least one metal layer overlying the first single crystal silicon layer, wherein the at least one metal layer comprises copper or aluminum more than other materials; and a second single crystal silicon layer overlying the at least one metal layer. The second single crystal silicon layer comprises a plurality of second transistors arranged in substantially parallel bands. Each of a plurality of the bands comprises a portion of the second transistors along an axis in a repeating pattern.

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Transceiver power distribution network

Hui Liu, +1 more
TL;DR: In this paper, a power distribution network comprises an interposer and a package substrate, each of which has a major upper surface and a major lower surface substantially parallel to the upper surface.
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TL;DR: In this article, an integrated circuit comprising an array of logic tiles, arranged in a row and a column, is presented, including a first logic tile to receive a first external clock signal, where each logic tile of a first plurality of logic tile generates the tile clock using (i) the first and second external clock signals are the same clock signals.
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Semiconductor device having a graphene interconnect

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Peng Du, +1 more
TL;DR: In this paper, a display device and a testing line repairing method for light-on testing is described. And the method comprises steps of: cutting off a connection between a first input end of a first thin film transistor (TFT), a first output end and a test signal input line; and connecting a first dummy line and a tested signal output line by a laser welding method.
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U-mos trench profile optimization and etch damage removal using microwaves

TL;DR: In this article, a U-shaped MOSFET (UMOS) semiconductor is formed by providing a semiconductor substrate, forming a trench in the substrate using a wet or dry etching process, and then radiating the trench structure using microwaves (MW) at low temperatures.
References
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Book

Digital Systems Testing and Testable Design

TL;DR: The new edition of Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems offers comprehensive and state-ofthe-art treatment of both testing and testable design.
Journal ArticleDOI

Nanowire transistors without junctions

TL;DR: A new type of transistor in which there are no junctions and no doping concentration gradients is proposed and demonstrated, which has near-ideal subthreshold slope, extremely low leakage currents, and less degradation of mobility with gate voltage and temperature than classical transistors.
Journal ArticleDOI

Designing reliable systems from unreliable components: the challenges of transistor variability and degradation

Shekhar Borkar
- 01 Nov 2005 - 
TL;DR: This article discusses effects of variability in transistor performance and proposes microarchitecture, circuit, and testing research that focuses on designing with many unreliable components (transistors) to yield reliable system designs.
Patent

Three dimensional structure memory

TL;DR: The 3Dimensional Structure (3DS) Memory (100) as mentioned in this paper is a three-dimensional structure (3D) memory that allows physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized.
Patent

Transparent contacts for organic devices

TL;DR: In this paper, a multicolor organic light emitting device employs vertically stacked layers of double heterostructure devices which are fabricated from organic compounds, and the devices are configured as stacked to provide a staircase profile whereby each device is separated from the other by a thin transparent conductive contact layer to enable light emanating from each of the devices to pass through the semitransparent contacts and through the lower device structures.