Patent
System comprising a semiconductor device and structure
Zvi Or-Bach,Brian Cronquist,Israel Beinglass,Jan Lodewijk de Jong,Deepak C. Sekar,Zeev Wurman +5 more
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TLDR
In this article, a system includes a semiconductor device consisting of a first single crystal silicon layer comprising first transistors, first alignment marks, and at least one metal layer overlying the first single-crystalline silicon layer.Abstract:
A system includes a semiconductor device. The semiconductor device includes a first single crystal silicon layer comprising first transistors, first alignment marks, and at least one metal layer overlying the first single crystal silicon layer, wherein the at least one metal layer comprises copper or aluminum more than other materials; and a second single crystal silicon layer overlying the at least one metal layer. The second single crystal silicon layer comprises a plurality of second transistors arranged in substantially parallel bands. Each of a plurality of the bands comprises a portion of the second transistors along an axis in a repeating pattern.read more
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Patent
Connection arrangements for integrated lateral diffusion field effect transistors
TL;DR: In this paper, the authors proposed a lateral diffusion field effect transistor (LDFET) that includes a source, a drain and a gate, and a second LDFET with a source and a drain.
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SGT-including pillar-shaped semiconductor device and method for producing the same
Masuoka Fujio,Harada Nozomu +1 more
TL;DR: In this paper, a SiO2 layer is formed on a side surface of the NiSi layer, and a wiring metal layer in the contact holes connects the SiSi layer and NiSi layers to each other.
Patent
Data Storage with In-situ String-Searching Capabilities Comprising Three-Dimensional Vertical One-Time-Programmable Memory
TL;DR: In this article, a preferred data storage with in-situ string-searching capabilities comprises a plurality of storage-processing units (SPU), with each SPU comprising at least a three-dimensional vertical one-time-programmable memory (3D-OTPV) array vertically stacked above a pattern-processing circuit.
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Method for producing pillar-shaped semiconductor memory device
Masuoka Fujio,Harada Nozomu +1 more
TL;DR: In this article, a method for producing a pillar-shaped semiconductor memory device includes forming a mask on a semiconductor substrate and etching to form semiconductor pillar on the substrate.
Patent
Methods of forming semiconductor devices including tunnel barrier materials
TL;DR: In this article, the magnetic tunnel junctions of a semiconductor device are described and a method of forming the tunnel magnetoresistance of the magnetic cell structures is described, as well as the methods of forming these tunnel magnetoreduction junctions.
References
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Book
Digital Systems Testing and Testable Design
TL;DR: The new edition of Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems offers comprehensive and state-ofthe-art treatment of both testing and testable design.
Journal ArticleDOI
Nanowire transistors without junctions
Jean-Pierre Colinge,Chi-Woo Lee,Aryan Afzalian,Aryan Afzalian,Nima Dehdashti Akhavan,Ran Yan,Isabelle Ferain,Pedram Razavi,B. O'Neill,Alan Blake,Mary White,Anne-Marie Kelleher,Brendan McCarthy,Richard Murphy +13 more
TL;DR: A new type of transistor in which there are no junctions and no doping concentration gradients is proposed and demonstrated, which has near-ideal subthreshold slope, extremely low leakage currents, and less degradation of mobility with gate voltage and temperature than classical transistors.
Journal ArticleDOI
Designing reliable systems from unreliable components: the challenges of transistor variability and degradation
TL;DR: This article discusses effects of variability in transistor performance and proposes microarchitecture, circuit, and testing research that focuses on designing with many unreliable components (transistors) to yield reliable system designs.
Patent
Three dimensional structure memory
TL;DR: The 3Dimensional Structure (3DS) Memory (100) as mentioned in this paper is a three-dimensional structure (3D) memory that allows physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized.
Patent
Transparent contacts for organic devices
TL;DR: In this paper, a multicolor organic light emitting device employs vertically stacked layers of double heterostructure devices which are fabricated from organic compounds, and the devices are configured as stacked to provide a staircase profile whereby each device is separated from the other by a thin transparent conductive contact layer to enable light emanating from each of the devices to pass through the semitransparent contacts and through the lower device structures.