Patent
System comprising a semiconductor device and structure
Zvi Or-Bach,Brian Cronquist,Israel Beinglass,Jan Lodewijk de Jong,Deepak C. Sekar,Zeev Wurman +5 more
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TLDR
In this article, a system includes a semiconductor device consisting of a first single crystal silicon layer comprising first transistors, first alignment marks, and at least one metal layer overlying the first single-crystalline silicon layer.Abstract:
A system includes a semiconductor device. The semiconductor device includes a first single crystal silicon layer comprising first transistors, first alignment marks, and at least one metal layer overlying the first single crystal silicon layer, wherein the at least one metal layer comprises copper or aluminum more than other materials; and a second single crystal silicon layer overlying the at least one metal layer. The second single crystal silicon layer comprises a plurality of second transistors arranged in substantially parallel bands. Each of a plurality of the bands comprises a portion of the second transistors along an axis in a repeating pattern.read more
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Patent
Semiconductor device and structure
Zvi Or-Bach,Brian Cronquist +1 more
TL;DR: In this paper, a first layer and a second layer of layer-transferred mono-crystallized silicon, where the first layer comprises a first plurality of horizontally-oriented transistors, and the second layer includes a second plurality of vertically oriented transistors.
Patent
Method for fabrication of a semiconductor device and structure
TL;DR: In this article, a method to process an Integrated Circuit device including processing a first layer of first transistors, then processing a metal layer overlaying the first layer and providing at least one connection to the first Transistors, and finally processing a second layer of second transistors overlaying a first metal layer, wherein the second metal layer is connected to provide power to at least 1 of the second Transistors.
Patent
Semiconductor devices and methods of manufacturing the same
TL;DR: In this article, a gate pattern and a source/drain region are formed at both sides of the gate pattern, and the first insulation layer pattern having an exposed portion of the source/drain region, forming a silicide layer on the exposed source and drain region, and forming a second insulation layer covering the entire surface of the substrate.
Patent
3D semiconductor device and structure
TL;DR: In this article, an Integrated Circuit device including a first layer including first single crystal transistors; a second layer overlaying the first layer, the second layer including second single-crystal transistors, where the second-layer thickness is less than one micron, where a plurality of the first transistors is circumscribed by a first dice lane of at least 10 microns width, and there are no first conductive connections to the plurality of transistors that cross the first-dice lane.
Patent
Semiconductor structure and method for manufacturing the same
TL;DR: In this article, a method for manufacturing a semiconductor structure, comprising of a mask layer to cover the metal interconnect liners and forming openings, which expose the metal internals on the mask layer, is presented.
References
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Patent
Method for preparing a substrate for semiconductor devices
TL;DR: In this article, a substrate is prepared by directly bonding a bonding wafer to a base wafer or by bonding the wafer with an oxide film formed on at least the bonding surface of the bonding Wafer or the bonding surfaces of the base Wafer to make semiconductor devices with an SOI structure.
Patent
Process for manufacturing three dimensional IC's
TL;DR: In this article, the alignment mark is formed in a space between a plurality of groups of elements, such as a scribe line area, and a second semiconductor substrate is provided with a groove corresponding to said space, or scribe lines area.
Patent
Full color light emitting diode display
Michael P. Norman,Paige M. Holm +1 more
TL;DR: In this paper, an array of organic light emitting diodes cooperates with the array of semiconductor light emitting Diodes to form multi-wavelength pixels of the full color light emitting diode display (310).
Patent
Layer transfer process and functionally enhanced integrated circuits produced thereby
TL;DR: In this article, a planar (2D) IC structure with added functional enhancements is provided, having a device layer sandwiched on both sides by other active, passive, and interconnecting components.
Patent
Reverse construction memory cell
TL;DR: In this paper, a method of fabricating a memory cell comprises forming a plurality of doped semiconductor layers on a carrier substrate, and then depositing an insulating material into the plurality of trenches.