Patent
System comprising a semiconductor device and structure
Zvi Or-Bach,Brian Cronquist,Israel Beinglass,Jan Lodewijk de Jong,Deepak C. Sekar,Zeev Wurman +5 more
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TLDR
In this article, a system includes a semiconductor device consisting of a first single crystal silicon layer comprising first transistors, first alignment marks, and at least one metal layer overlying the first single-crystalline silicon layer.Abstract:
A system includes a semiconductor device. The semiconductor device includes a first single crystal silicon layer comprising first transistors, first alignment marks, and at least one metal layer overlying the first single crystal silicon layer, wherein the at least one metal layer comprises copper or aluminum more than other materials; and a second single crystal silicon layer overlying the at least one metal layer. The second single crystal silicon layer comprises a plurality of second transistors arranged in substantially parallel bands. Each of a plurality of the bands comprises a portion of the second transistors along an axis in a repeating pattern.read more
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Patent
Magnetic devices with magnetic and getter regions
TL;DR: In this paper, a magnetic cell includes magnetic, secondary oxide, and getter seed regions, and the depletion of the magnetic material enables crystallization of the depleted magnetic material through crystal structure propagation from a neighboring crystalline material.
Patent
Multi-dimensional integrated circuit having multiple planes and memory architecture having a honeycomb or bee hive structure
Danny Rittman,Aliza Schnapp +1 more
TL;DR: In this article, a monolithic multi-dimensional integrated circuits and memory architecture is presented, which includes an electronic board having a first side and a second side, a multidimensional electronic package having multiple planes, and one or more semiconductor wafers mounted on the first and second side of the electronic board and on the multiple planes of the package.
Patent
Method and apparatus for flip chip packaging co-design and co-designed flip chip package
Jia-Wei Fang,Shen-Yu Huang +1 more
TL;DR: In this article, a method for flip chip packaging co-design is presented, which comprises steps of: providing an I/O pad information of a chip and a connection information of the PCB, performing a first I/Os pad placement according to the I/OP pad information and the connection information, utilizing a RDL routing analysis device to perform a bump pad pitch analysis.
Patent
Magnetoresistive structures, semiconductor devices, and related systems
TL;DR: A magnetic cell core includes at least one magnetic region (e.g., a free region or a fixed region) configured to exhibit a vertical magnetic orientation as discussed by the authors, which may be a tunnel junction region or an oxide capping region.
Patent
Semiconductor devices with seed and magnetic regions and methods of fabrication
TL;DR: In this article, a magnetic cell core is defined as a seed region with a plurality of magnetic regions and plurality of non-magnetic regions thereover, which can be configured to have a high magnetic anisotropy strength, a high energy barrier ratio, high tunnel magnetoresistance, a low programming current, low cell-to-cell electrical resistance variation, and low cell to-cell variation.
References
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Book
Digital Systems Testing and Testable Design
TL;DR: The new edition of Breuer-Friedman's Diagnosis and Reliable Design ofDigital Systems offers comprehensive and state-ofthe-art treatment of both testing and testable design.
Journal ArticleDOI
Nanowire transistors without junctions
Jean-Pierre Colinge,Chi-Woo Lee,Aryan Afzalian,Aryan Afzalian,Nima Dehdashti Akhavan,Ran Yan,Isabelle Ferain,Pedram Razavi,B. O'Neill,Alan Blake,Mary White,Anne-Marie Kelleher,Brendan McCarthy,Richard Murphy +13 more
TL;DR: A new type of transistor in which there are no junctions and no doping concentration gradients is proposed and demonstrated, which has near-ideal subthreshold slope, extremely low leakage currents, and less degradation of mobility with gate voltage and temperature than classical transistors.
Journal ArticleDOI
Designing reliable systems from unreliable components: the challenges of transistor variability and degradation
TL;DR: This article discusses effects of variability in transistor performance and proposes microarchitecture, circuit, and testing research that focuses on designing with many unreliable components (transistors) to yield reliable system designs.
Patent
Three dimensional structure memory
TL;DR: The 3Dimensional Structure (3DS) Memory (100) as mentioned in this paper is a three-dimensional structure (3D) memory that allows physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized.
Patent
Transparent contacts for organic devices
TL;DR: In this paper, a multicolor organic light emitting device employs vertically stacked layers of double heterostructure devices which are fabricated from organic compounds, and the devices are configured as stacked to provide a staircase profile whereby each device is separated from the other by a thin transparent conductive contact layer to enable light emanating from each of the devices to pass through the semitransparent contacts and through the lower device structures.