scispace - formally typeset
Search or ask a question

Showing papers on "Transistor published in 2018"


Journal ArticleDOI
21 Feb 2018-Nature
TL;DR: The seamless integration of a memristor and transistor into one multi-terminal device could enable complex neuromorphic learning and the study of the physics of defect kinetics in two-dimensional materials.
Abstract: Memristors are two-terminal passive circuit elements that have been developed for use in non-volatile resistive random-access memory and may also be useful in neuromorphic computing. Memristors have higher endurance and faster read/write times than flash memory and can provide multi-bit data storage. However, although two-terminal memristors have demonstrated capacity for basic neural functions, synapses in the human brain outnumber neurons by more than a thousandfold, which implies that multi-terminal memristors are needed to perform complex functions such as heterosynaptic plasticity. Previous attempts to move beyond two-terminal memristors, such as the three-terminal Widrow-Hoff memristor and field-effect transistors with nanoionic gates or floating gates, did not achieve memristive switching in the transistor. Here we report the experimental realization of a multi-terminal hybrid memristor and transistor (that is, a memtransistor) using polycrystalline monolayer molybdenum disulfide (MoS2) in a scalable fabrication process. The two-dimensional MoS2 memtransistors show gate tunability in individual resistance states by four orders of magnitude, as well as large switching ratios, high cycling endurance and long-term retention of states. In addition to conventional neural learning behaviour of long-term potentiation/depression, six-terminal MoS2 memtransistors have gate-tunable heterosynaptic functionality, which is not achievable using two-terminal memristors. For example, the conductance between a pair of floating electrodes (pre- and post-synaptic neurons) is varied by a factor of about ten by applying voltage pulses to modulatory terminals. In situ scanning probe microscopy, cryogenic charge transport measurements and device modelling reveal that the bias-induced motion of MoS2 defects drives resistive switching by dynamically varying Schottky barrier heights. Overall, the seamless integration of a memristor and transistor into one multi-terminal device could enable complex neuromorphic learning and the study of the physics of defect kinetics in two-dimensional materials.

628 citations


Journal ArticleDOI
01 Sep 2018-Nature
TL;DR: Self-powered ultra-flexible electronic devices that can measure biometric signals with very high signal-to-noise ratios when applied to skin or other tissue are realized and offer a general platform for next-generation self-powered electronics.
Abstract: Next-generation biomedical devices1-9 will need to be self-powered and conformable to human skin or other tissue. Such devices would enable the accurate and continuous detection of physiological signals without the need for an external power supply or bulky connecting wires. Self-powering functionality could be provided by flexible photovoltaics that can adhere to moveable and complex three-dimensional biological tissues1-4 and skin5-9. Ultra-flexible organic power sources10-13 that can be wrapped around an object have proven mechanical and thermal stability in long-term operation13, making them potentially useful in human-compatible electronics. However, the integration of these power sources with functional electric devices including sensors has not yet been demonstrated because of their unstable output power under mechanical deformation and angular change. Also, it will be necessary to minimize high-temperature and energy-intensive processes10,12 when fabricating an integrated power source and sensor, because such processes can damage the active material of the functional device and deform the few-micrometre-thick polymeric substrates. Here we realize self-powered ultra-flexible electronic devices that can measure biometric signals with very high signal-to-noise ratios when applied to skin or other tissue. We integrated organic electrochemical transistors used as sensors with organic photovoltaic power sources on a one-micrometre-thick ultra-flexible substrate. A high-throughput room-temperature moulding process was used to form nano-grating morphologies (with a periodicity of 760 nanometres) on the charge transporting layers. This substantially increased the efficiency of the organophotovoltaics, giving a high power-conversion efficiency that reached 10.5 per cent and resulted in a high power-per-weight value of 11.46 watts per gram. The organic electrochemical transistors exhibited a transconductance of 0.8 millisiemens and fast responsivity above one kilohertz under physiological conditions, which resulted in a maximum signal-to-noise ratio of 40.02 decibels for cardiac signal detection. Our findings offer a general platform for next-generation self-powered electronics.

617 citations


Journal ArticleDOI
TL;DR: In this article, a two-dimensional steep-slope MOSFET with a ferroelectric hafnium zirconium oxide layer in the gate dielectric stack is presented.
Abstract: The so-called Boltzmann tyranny defines the fundamental thermionic limit of the subthreshold slope of a metal-oxide-semiconductor field-effect transistor (MOSFET) at 60 mV dec-1 at room temperature and therefore precludes lowering of the supply voltage and overall power consumption 1,2 . Adding a ferroelectric negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this fundamental barrier 3 . Meanwhile, two-dimensional semiconductors such as atomically thin transition-metal dichalcogenides, due to their low dielectric constant and ease of integration into a junctionless transistor topology, offer enhanced electrostatic control of the channel 4-12 . Here, we combine these two advantages and demonstrate a molybdenum disulfide (MoS2) two-dimensional steep-slope transistor with a ferroelectric hafnium zirconium oxide layer in the gate dielectric stack. This device exhibits excellent performance in both on and off states, with a maximum drain current of 510 μA μm-1 and a sub-thermionic subthreshold slope, and is essentially hysteresis-free. Negative differential resistance was observed at room temperature in the MoS2 negative-capacitance FETs as the result of negative capacitance due to the negative drain-induced barrier lowering. A high on-current-induced self-heating effect was also observed and studied.

382 citations


Journal ArticleDOI
TL;DR: In this article, the performance of high voltage rectifiers and enhancement-mode metal-oxide field effect transistors on Ga2O3 has been evaluated and shown to benefit from the larger critical electric field relative to either SiC or GaN.
Abstract: Gallium oxide (Ga2O3) is emerging as a viable candidate for certain classes of power electronics with capabilities beyond existing technologies due to its large bandgap, controllable doping, and the availability of large diameter, relatively inexpensive substrates. These applications include power conditioning systems, including pulsed power for avionics and electric ships, solid-state drivers for heavy electric motors, and advanced power management and control electronics. Wide bandgap (WBG) power devices offer potential savings in both energy and cost. However, converters powered by WBG devices require innovation at all levels, entailing changes to system design, circuit architecture, qualification metrics, and even market models. The performance of high voltage rectifiers and enhancement-mode metal-oxide field effect transistors benefits from the larger critical electric field of β-Ga2O3 relative to either SiC or GaN. Reverse breakdown voltages of over 2 kV for β-Ga2O3 have been reported, either with or without edge termination and over 3 kV for a lateral field-plated Ga2O3 Schottky diode on sapphire. The metal-oxide-semiconductor field-effect transistors fabricated on Ga2O3 to date have predominantly been depletion (d-mode) devices, with a few demonstrations of enhancement (e-mode) operation. While these results are promising, what are the limitations of this technology and what needs to occur for it to play a role alongside the more mature SiC and GaN power device technologies? The low thermal conductivity might be mitigated by transferring devices to another substrate or thinning down the substrate and using a heatsink as well as top-side heat extraction. We give a perspective on the materials’ properties and physics of transport, thermal conduction, doping capabilities, and device design that summarizes the current limitations and future areas of development. A key requirement is continued interest from military electronics development agencies. The history of the power electronics device field has shown that new technologies appear roughly every 10-12 years, with a cycle of performance evolution and optimization. The older technologies, however, survive long into the marketplace, for various reasons. Ga2O3 may supplement SiC and GaN, but is not expected to replace them.

348 citations


Journal ArticleDOI
01 Jan 2018
TL;DR: The potential of thin-film transistor technologies in the development of low-cost, flexible integrated circuits for applications beyond flat-panel displays, including the Internet of Things and lightweight wearable electronics is discussed and the concept of a Moore's law for flexible electronics is proposed.
Abstract: The use of thin-film transistors in liquid-crystal display applications was commercialized about 30 years ago. The key advantages of thin-film transistor technologies compared with traditional silicon complementary metal–oxide–semiconductor(CMOS) transistors are their ability to be manufactured on large substrates at low-cost per unit area and at low processing temperatures, which allows them to be directly integrated onto a variety of flexible substrates. Here, I discuss the potential of thin-film transistor technologies in the development of low-cost, flexible integrated circuits for applications beyond flat-panel displays, including the Internet of Things and lightweight wearable electronics. Focusing on the relatively mature thin-film transistor technologies that are available in semiconductor fabrication plants today, the different technologies are evaluated in terms of their potential circuit applications and the implications they will have in the design of integrated circuits, from basic logic gates to more complex digital and analogue systems. I also discuss microprocessors and non-silicon, near-field communication tags that can communicate with smartphones, and I propose the concept of a Moore’s law for flexible electronics. This Perspective discusses the potential of thin-film transistor technologies in the development of low-cost, flexible integrated circuits, evaluating the more mature technologies available today in terms of their potential circuit applications and the implications they will have in the design of integrated circuits.

329 citations


Journal ArticleDOI
TL;DR: It is demonstrated that wafer-size single crystals composed of an organic semiconductor bimolecular layer with an excellent mobility of 10 cm2 V−1 s−1 can be successfully formed via a simple one-shot solution process.
Abstract: Two-dimensional (2D) layered semiconductors are a novel class of functional materials that are an ideal platform for electronic applications, where the whole electronic states are directly modified by external stimuli adjacent to their electronic channels. Scale-up of the areal coverage while maintaining homogeneous single crystals has been the relevant challenge. We demonstrate that wafer-size single crystals composed of an organic semiconductor bimolecular layer with an excellent mobility of 10 cm2 V-1 s-1 can be successfully formed via a simple one-shot solution process. The well-controlled process to achieve organic single crystals composed of minimum molecular units realizes unprecedented low contact resistance and results in high-speed transistor operation of 20 MHz, which is twice as high as the common frequency used in near-field wireless communication. The capability of the solution process for scale-up coverage of high-mobility organic semiconductors opens up the way for novel 2D nanomaterials to realize products with large-scale integrated circuits on film-based devices.

216 citations


Patent
28 Sep 2018
TL;DR: In this article, a display panel comprises a plurality of light-emitting units, each light emitting unit comprises a light emitting device and a corresponding pixel circuit, and each pixel circuit is connected to the first power line, the second power line and the initialization signal line.
Abstract: The embodiment of the invention discloses a display panel and a display device. The display panel comprises a plurality of light-emitting units, each light-emitting unit comprises a light-emitting device and a corresponding pixel circuit, and the display panel comprises a first power line, a second power line and an initialization signal line; each pixel circuit is connected to the first power line, the second power line and the initialization signal line; each pixel circuit comprises a driving transistor, and the driving transistor and the light-emitting device are sequentially connected between the first power line and the second power line; in the screen-off display mode, the voltage transmitted to the first pole of the driving transistor in the pixel circuit by the first power line isequal to the absolute value of the voltage on the initialization signal line, and the voltage transmitted to the second pole of the light emitting device corresponding to the pixel circuit by the second power line is greater than the voltage of the light emitting device in the non-screen-off display mode. According to the technical scheme, the power consumption of the screen-off display mode of the display device is reduced, so the standby time of the display device is prolonged, and the user experience is improved.

194 citations


Journal ArticleDOI
Shilei Dai1, Xiaohan Wu1, Dapeng Liu1, Yingli Chu1, Kai Wang1, Ben Yang1, Jia Huang1 
TL;DR: A simple and effective strategy for fabricating light-stimulated synaptic transistors with both memory and learning ability is provided by utilizing interface charge trapping effect of organic field-effect transistors (OFETs).
Abstract: Synaptic transistors stimulated by light waves or photons may offer advantages to the devices, such as wide bandwidth, ultrafast signal transmission, and robustness. However, previously reported light-stimulated synaptic devices generally require special photoelectric properties from the semiconductors and sophisticated device’s architectures. In this work, a simple and effective strategy for fabricating light-stimulated synaptic transistors is provided by utilizing interface charge trapping effect of organic field-effect transistors (OFETs). Significantly, our devices exhibited highly synapselike behaviors, such as excitatory postsynaptic current (EPSC) and pair-pulse facilitation (PPF), and presented memory and learning ability. The EPSC decay, PPF curves, and forgetting behavior can be well expressed by mathematical equations for synaptic devices, indicating that interfacial charge trapping effect of OFETs can be utilized as a reliable strategy to realize organic light-stimulated synapses. Therefore, t...

183 citations


Journal ArticleDOI
TL;DR: In this article, the authors demonstrate plasmon-assisted resonant detection of terahertz radiation by antenna-coupled graphene transistors that act as both plasmoric Fabry-Perot cavities and rectifying elements.
Abstract: Plasmons, collective oscillations of electron systems, can efficiently couple light and electric current, and thus can be used to create sub-wavelength photodetectors, radiation mixers, and on-chip spectrometers. Despite considerable effort, it has proven challenging to implement plasmonic devices operating at terahertz frequencies. The material capable to meet this challenge is graphene as it supports long-lived electrically-tunable plasmons. Here we demonstrate plasmon-assisted resonant detection of terahertz radiation by antenna-coupled graphene transistors that act as both plasmonic Fabry-Perot cavities and rectifying elements. By varying the plasmon velocity using gate voltage, we tune our detectors between multiple resonant modes and exploit this functionality to measure plasmon wavelength and lifetime in bilayer graphene as well as to probe collective modes in its moire minibands. Our devices offer a convenient tool for further plasmonic research that is often exceedingly difficult under non-ambient conditions (e.g. cryogenic temperatures and strong magnetic fields) and promise a viable route for various photonic applications.

171 citations


Journal ArticleDOI
01 Jun 2018
TL;DR: In this article, an asymmetric van der Waals heterostructure device, which is composed of graphene, hexagonal boron nitride, molybdenum disulfide and molymdenum ditelluride, can function as a high-performance diode, transistor, photodetector and programmable rectifier.
Abstract: Two-dimensional materials are of interest for the development of electronic devices due to their useful properties and compatibility with silicon-based technology. Van der Waals heterostructures, in which two-dimensional materials are stacked on top of each other, allow different materials and properties to be combined and for multifunctional devices to be created. Here we show that an asymmetric van der Waals heterostructure device, which is composed of graphene, hexagonal boron nitride, molybdenum disulfide and molybdenum ditelluride, can function as a high-performance diode, transistor, photodetector and programmable rectifier. Due to the asymmetric structure of the device, charge-carrier injection can be switched between tunnelling and thermal activation under negative and positive bias conditions, respectively. As a result, the device exhibits a high current on/off ratio of 6 × 108 and a rectifying ratio of ~108. The device can also function as a programmable rectifier with stable retention and continuously tunable memory states, as well as a high program/erase current ratio of ~109 and a rectification ratio of ~107. An asymmetric van der Waals heterostructure device, which is composed of graphene, hexagonal boron nitride, molybdenum disulfide and molybdenum ditelluride, can function as a high-performance diode, transistor, photodetector and programmable rectifier.

161 citations


Journal ArticleDOI
TL;DR: In this article, the authors discuss the high-bias electrical characteristics of back-gated field effect transistors with CVD-synthesized bilayer MoS2 channel and Ti Schottky contacts.
Abstract: We discuss the high-bias electrical characteristics of back-gated field-effect transistors with CVD-synthesized bilayer MoS2 channel and Ti Schottky contacts. We find that oxidized Ti contacts on MoS2 form rectifying junctions with ~0.3 to 0.5 eV Schottky barrier height. To explain the rectifying output characteristics of the transistors, we propose a model based on two slightly asymmetric back-to-back Schottky barriers, where the highest current arises from image force barrier lowering at the electrically forced junction, while the reverse current is due to Schottky-barrier limited injection at the grounded junction. The device achieves a photo responsivity greater than 2.5 AW-1 under 5 mWcm-2 white-LED light. By comparing two- and four-probe measurements, we demonstrate that the hysteresis and persistent photoconductivity exhibited by the transistor are peculiarities of the MoS2 channel rather than effects of the Ti/MoS2 interface.

Journal ArticleDOI
TL;DR: Modified switching device architecture is proposed for efficiently exploiting the high-k dielectric Al2O3 layer, which, when integrated in an active matrix, can drive the ultrathin OLED display even in dynamic folding states.
Abstract: Atomically thin molybdenum disulfide (MoS2) has been extensively investigated in semiconductor electronics but has not been applied in a backplane circuitry of organic light-emitting diode (OLED) display. Its applicability as an active drive element is hampered by the large contact resistance at the metal/MoS2 interface, which hinders the transport of carriers at the dielectric surface, which in turn considerably deteriorates the mobility. Modified switching device architecture is proposed for efficiently exploiting the high-k dielectric Al2O3 layer, which, when integrated in an active matrix, can drive the ultrathin OLED display even in dynamic folding states. The proposed architecture exhibits 28 times increase in mobility compared to a normal back-gated thin-film transistor, and its potential as a wearable display attached to a human wrist is demonstrated.

Journal ArticleDOI
TL;DR: In this paper, a detailed understanding of the device physics at deep-cryogenic temperatures was developed based on a compact model based on MOS11 and PSP, and the accuracy and validity of the compact models were demonstrated by comparing time and frequency-domain simulations of complex circuits, such as a ring oscillator and a low-noise amplifier, with the measurements at 4 K.
Abstract: Cryogenic characterization and modeling of two nanometer bulk CMOS technologies (0.16- $\mu \text{m}$ and 40-nm) are presented in this paper. Several devices from both technologies were extensively characterized at temperatures of 4 K and below. Based on a detailed understanding of the device physics at deep-cryogenic temperatures, a compact model based on MOS11 and PSP was developed. In addition to reproducing the device dc characteristics, the accuracy and validity of the compact models are demonstrated by comparing time- and frequency-domain simulations of complex circuits, such as a ring oscillator and a low-noise amplifier, with the measurements at 4 K.

Journal ArticleDOI
TL;DR: Analysis and experiments indicated that IGCT was suitable for natural commutation low-voltage and low-current hybrid circuit breakers, due to its low on-state voltage and huge surge current conduction ability.
Abstract: As power semiconductor devices are the key components of hybrid DC circuit breakers (HCBs), how to select suitable devices is critical for the whole HCB design. First, this paper compared the general characteristics of press pack insulated gate bipolar transistor (IGBT), injection-enhanced gate transistor (IEGT), and integrated gate commutated thyristor (IGCT). Then working conditions of devices were analyzed from the perspective of HCBs. According to these, vital features of devices including maximum turn-off current, on-state voltage, conduction ability, and robustness of power semiconductor devices were carefully analyzed and compared. Related experiments were implemented to compare maximum turn-off capability, and the 4.5 kV/3 kA IGBT/IEGT was able to turn off 19 and 22 kA respectively after 5-ms current conduction. Analysis and experiments indicated that IGCT was suitable for natural commutation low-voltage and low-current hybrid circuit breakers, due to its low on-state voltage and huge surge current conduction ability. Comparatively, IGBT and IEGT were more suitable for very high current interruption, and IEGT was the superior selection among available commercial devices. However, the interference should be considered in applications.

Journal ArticleDOI
TL;DR: The results demonstrate that the all-acceptor approach is superior to the donor- acceptor one, which results in unipolar electron transport with more ideal transistor performance characteristics.
Abstract: High-performance unipolar n-type polymer semiconductors are critical for advancing the field of organic electronics, which relies on the design and synthesis of new electron-deficient building blocks with good solubilizing capability, favorable geometry, and optimized electrical properties. Herein, two novel imide-functionalized thiazoles, 5,5'-bithiazole-4,4'-dicarboxyimide (BTzI) and 2,2'-bithiazolothienyl-4,4',10,10'-tetracarboxydiimide (DTzTI), are successfully synthesized. Single crystal analysis and physicochemical study reveal that DTzTI is an excellent building block for constructing all-acceptor homopolymers, and the resulting polymer poly(2,2'-bithiazolothienyl-4,4',10,10'-tetracarboxydiimide) (PDTzTI) exhibits unipolar n-type transport with a remarkable electron mobility (μe ) of 1.61 cm2 V-1 s-1 , low off-currents (Ioff ) of 10-10 -10-11 A, and substantial current on/off ratios (Ion /Ioff ) of 107 -108 in organic thin-film transistors. The all-acceptor homopolymer shows distinctive advantages over prevailing n-type donor-acceptor copolymers, which suffer from ambipolar transport with high Ioff s > 10-8 A and small Ion /Ioff s < 105 . The results demonstrate that the all-acceptor approach is superior to the donor-acceptor one, which results in unipolar electron transport with more ideal transistor performance characteristics.

Journal ArticleDOI
TL;DR: In this paper, the performance of N-polar GaN-based metal-insulator-semiconductor high-electron-mobility transistors at 30 and 94 GHz was investigated.
Abstract: This paper reports on state-of-the-art millimeter-wave power performance of N-polar GaN-based metal–insulator–semiconductor high-electron-mobility transistors at 30 and 94 GHz. The performance is enabled by our N-polar deep recess structure, whereby a GaN cap layer is added in the access regions of the transistor to simultaneously enhance the access region conductivity while mitigating dc-to-RF dispersion. The impact of lateral scaling of the drain access region length is examined using the tradeoff between breakdown voltage and small-signal gain. Load-pull measurements are presented at 94 GHz, corresponding to the target device operating frequency in W-band, where the device demonstrated a peak power-added efficiency (PAE) of 28.8% at 16 V and record-high maximum output power density of 8 W/mm at 20 V. Additional load-pull measurements at 30 and 10 GHz demonstrate the viability of this device across a wide frequency range where the peak power remained constant at 8 W/mm and with peak PAEs of 56% and 58%, respectively.

Journal ArticleDOI
TL;DR: A new class of artificial synaptic architecture, a three‐terminal device consisting of a vertically integrated monolithic tungsten oxide memristor, and a variable‐barrier tungsen selenide/graphene Schottky diode, termed as a ‘synaptic barrister,’ are reported, which can implement essential synaptic characteristics, such as short‐term plasticity, long‐term Plasticity, and paired‐pulse facilitation.
Abstract: The development of energy-efficient artificial synapses capable of manifoldly tuning synaptic activities can provide a significant breakthrough toward novel neuromorphic computing technology Here, a new class of artificial synaptic architecture, a three-terminal device consisting of a vertically integrated monolithic tungsten oxide memristor, and a variable-barrier tungsten selenide/graphene Schottky diode, termed as a 'synaptic barrister,' are reported The device can implement essential synaptic characteristics, such as short-term plasticity, long-term plasticity, and paired-pulse facilitation Owing to the electrostatically controlled barrier height in the ultrathin van der Waals heterostructure, the device exhibits gate-controlled memristive switching characteristics with tunable programming voltages of 02-05 V Notably, by electrostatic tuning with a gate terminal, it can additionally regulate the degree and tuning rate of the synaptic weight independent of the programming impulses from source and drain terminals Such gate tunability cannot be accomplished by previously reported synaptic devices such as memristors and synaptic transistors only mimicking the two-neuronal-based synapse These capabilities eventually enable the accelerated consolidation and conversion of synaptic plasticity, functionally analogous to the synapse with an additional neuromodulator in biological neural networks

Journal ArticleDOI
TL;DR: In this article, a physics-based analytical model for the MOS transistor operating continuously from room temperature down to liquid-helium temperature (4.2 K) from depletion to strong inversion and in the linear and saturation regimes was developed relying on the 1-D Poisson equation and the drift-diffusion transport mechanism.
Abstract: This paper presents a physics-based analytical model for the MOS transistor operating continuously from room temperature down to liquid-helium temperature (4.2 K) from depletion to strong inversion and in the linear and saturation regimes. The model is developed relying on the 1-D Poisson equation and the drift-diffusion transport mechanism. The validity of the Maxwell–Boltzmann approximation is demonstrated in the limit to 0 K as a result of dopant freezeout in cryogenic equilibrium. Explicit MOS transistor expressions are then derived, including incomplete dopant ionization, bandgap widening, mobility reduction, and interface charge traps. The temperature dependence of the interface trapping process explains the discrepancy between the measured value of the subthreshold swing and the thermal limit at deep-cryogenic temperatures. The accuracy of the developed model is validated by experimental results on long devices of a commercial 28-nm bulk CMOS process. The proposed model provides the core expressions for the development of physically accurate compact models dedicated to low-temperature CMOS circuit simulation.

Journal ArticleDOI
01 Mar 2018
TL;DR: In this paper, the authors show that high-performance carbon nanotube TFTs and complementary circuits can be fabricated on flexible polyimide substrates using a high-yield, scalable process.
Abstract: High-performance logic circuits that are constructed on flexible or unconventional substrates are required for emerging applications such as real-time analytics. Carbon nanotube thin-film transistors (TFTs) are attractive for these applications because of their high mobility and low cost. However, flexible nanotube TFTs usually suffer from much lower performance than those built on rigid substrates, and the resulting flexible integrated circuits typically exhibit low-speed operation with logic gate delays of over 1 μs, which severely limits their practical application. Here we show that high-performance carbon nanotube TFTs and complementary circuits can be fabricated on flexible polyimide substrates using a high-yield, scalable process. Our flexible TFTs exhibit state-of-the-art performance with very high current densities (>17 μA μm−1), large current on/off ratios (>106), small subthreshold slopes (<200 mV dec−1), high field-effect mobilities (~50 cm2 V−1 s−1) and excellent flexibility. We also develop a reliable n-type doping process, which allows us to fabricate complementary logic gates and integrated circuits on flexible substrates. With our approach, we build flexible ring oscillators that have a stage delay of only 5.7 ns. High-performance carbon nanotube thin-film transistors and complementary circuits can be fabricated on flexible substrates, including ring oscillators that have a stage delay of only 5.7 ns.

Journal ArticleDOI
TL;DR: The results show that semiconductor nanophotonic devices can produce strong and controlled photon-photon interactions that could enable high-bandwidth photonic quantum information processing.
Abstract: Single-photon switches and transistors generate strong photon-photon interactions that are essential for quantum circuits and networks. However, to deterministically control an optical signal with a single photon requires strong interactions with a quantum memory, which have been lacking in a solid-state platform. We realize a single-photon switch and transistor enabled by a solid-state quantum memory. Our device consists of a semiconductor spin qubit strongly coupled to a nanophotonic cavity. The spin qubit enables a single gate photon to switch a signal field containing up to an average of 27.7 photons, with a switching time of 63 ps. Our results show that semiconductor nanophotonic devices can produce strong and controlled photon-photon interactions that could enable high-bandwidth photonic quantum information processing.

Journal ArticleDOI
TL;DR: In this paper, a high current density of 1'kA/cm2 was achieved in enhancement-mode Ga2O3 vertical power metal-insulator field effect transistors with fin-shaped channels.
Abstract: A high current density of 1 kA/cm2 is experimentally realized in enhancement-mode Ga2O3 vertical power metal-insulator field-effect transistors with fin-shaped channels Comparative analysis shows that the more than doubled current density over the prior art arises from a larger transistor channel width; on the other hand, a wider channel also leads to a more severe drain-induced barrier lowering therefore premature transistor breakdown at zero gate-source bias The observation of a higher current density in a wider channel confirms that charge trapping in the gate dielectric limits the effective field-effect mobility in these transistor channels, which is about 2× smaller than the electron mobility in the Ga2O3 drift layer The tradeoff between output-current density and breakdown voltage also depends on the trap density With minimal trap states, the output current density should remain high while breakdown voltage increases with decreasing fin-channel width

Journal ArticleDOI
TL;DR: High-frequency results reveal that a key figure of merit, the cutoff frequency, is about 10 THz for sub-μm2 switches with favorable scaling that can afford fc above 100 THz for nanoscale devices, exceeding the performance of contemporary switches that suffer from an area-invariant scaling.
Abstract: Recently, non-volatile resistance switching or memristor (equivalently, atomristor in atomic layers) effect was discovered in transitional metal dichalcogenides (TMD) vertical devices. Owing to the monolayer-thin transport and high crystalline quality, ON-state resistances below 10 Ω are achievable, making MoS2 atomristors suitable as energy-efficient radio-frequency (RF) switches. MoS2 RF switches afford zero-hold voltage, hence, zero-static power dissipation, overcoming the limitation of transistor and mechanical switches. Furthermore, MoS2 switches are fully electronic and can be integrated on arbitrary substrates unlike phase-change RF switches. High-frequency results reveal that a key figure of merit, the cutoff frequency (fc), is about 10 THz for sub-μm2 switches with favorable scaling that can afford fc above 100 THz for nanoscale devices, exceeding the performance of contemporary switches that suffer from an area-invariant scaling. These results indicate a new electronic application of TMDs as non-volatile switches for communication platforms, including mobile systems, low-power internet-of-things, and THz beam steering.

Journal ArticleDOI
TL;DR: In this article, the current status of semiconductor diamond technology is reviewed, including selective area doping, lithography, etching, formation of diamond/oxide interfaces and defect reduction.

Proceedings ArticleDOI
01 Feb 2018
TL;DR: A new model for 3D NAND flash memory reliability is developed, which predicts how retention, wearout, self-recovery, and temperature affect raw bit error rates and cell threshold voltages and shows that the model is accurate, with an error of only 4.9%.
Abstract: NAND flash memory density continues to scale to keep up with the increasing storage demands of data-intensive applications. Unfortunately, as a result of this scaling, the lifetime of NAND flash memory has been decreasing. Each cell in NAND flash memory can endure only a limited number of writes, due to the damage caused by each program and erase operation on the cell. This damage can be partially repaired on its own during the idle time between program or erase operations (known as the dwell time), via a phenomenon known as the self-recovery effect. Prior works study the self-recovery effect for planar (i.e., 2D) NAND flash memory, and propose to exploit it to improve flash lifetime, by applying high temperature to accelerate self-recovery. However, these findings may not be directly applicable to 3D NAND flash memory, due to significant changes in the design and manufacturing process that are required to enable practical 3D stacking for NAND flash memory. In this paper, we perform the first detailed experimental characterization of the effects of self-recovery and temperature on real, state-of-the-art 3D NAND flash memory devices. We show that these effects influence two major factors of NAND flash memory reliability: (1) retention loss speed (i.e., the speed at which a flash cell leaks charge), and (2) program variation (i.e., the difference in programming speed across flash cells). We find that self-recovery and temperature affect 3D NAND flash memory quite differently than they affect planar NAND flash memory, rendering prior models of self-recovery and temperature ineffective for 3D NAND flash memory. Using our characterization results, we develop a new model for 3D NAND flash memory reliability, which predicts how retention, wearout, self-recovery, and temperature affect raw bit error rates and cell threshold voltages. We show that our model is accurate, with an error of only 4.9%. Based on our experimental findings and our model, we propose HeatWatch, a new mechanism to improve 3D NAND flash memory reliability. The key idea of HeatWatch is to optimize the read reference voltage, i.e., the voltage applied to the cell during a read operation, by adapting it to the dwell time of the workload and the current operating temperature. HeatWatch (1) efficiently tracks flash memory temperature and dwell time online, (2) sends this information to our reliability model to predict the current voltages of flash cells, and (3) predicts the optimal read reference voltage based on the current cell voltages. Our detailed experimental evaluations show that HeatWatch improves flash lifetime by 3.85× over a baseline that uses a fixed read reference voltage, averaged across 28 real storage workload traces, and comes within 0.9% of the lifetime of an ideal read reference voltage selection mechanism.

Journal ArticleDOI
TL;DR: High-performance transistors are demonstrated that utilize solid-state ionic conductive cellulose nanopaper as the dielectric and no discernible drain current change is observed when the device is under bending with radius down to 1 mm.
Abstract: Biodegradability, low-voltage operation, and flexibility are important trends for the future organic electronics. High-capacitance dielectrics are essential for low-voltage organic field-effect transistors. Here we report the application of environmental-friendly cellulose nanopapers as high-capacitance dielectrics with intrinsic ionic conductivity. Different with the previously reported liquid/electrolyte-gated dielectrics, cellulose nanopapers can be applied as all-solid dielectrics without any liquid or gel. Organic field-effect transistors fabricated with cellulose nanopaper dielectrics exhibit good transistor performances under operation voltage below 2 V, and no discernible drain current change is observed when the device is under bending with radius down to 1 mm. Interesting properties of the cellulose nanopapers, such as ionic conductivity, ultra-smooth surface (~0.59 nm), high transparency (above 80%) and flexibility make them excellent candidates as high-capacitance dielectrics for flexible, transparent and low-voltage electronics. Next-generation organic electronics require flexible organic field effect transistors that show low-voltage operation and are biodegradable. Here, Huang and co-workers demonstrate high-performance transistors that utilize solid-state ionic conductive cellulose nanopaper as the dielectric.

Journal ArticleDOI
TL;DR: In this paper, the authors investigated the transport properties of 1-40 layers of two-dimensional tungsten diselenide (WSe2) transistors with different temperature ranges from 300 to 5'K.
Abstract: Tungsten diselenide (WSe2) has many excellent properties and provides superb potential in applications of valley-based electronics, spin-electronics, and optoelectronics. To facilitate the digital and analog application of WSe2 in CMOS, it is essential to understand the underlying ambipolar hole and electron transport behavior. Herein, the electric field screening of WSe2 with a thickness range of 1–40 layers is systemically studied by electrostatic force microscopy in combination with non-linear Thomas–Fermi theory to interpret the experimental results. The ambipolar transport behavior of 1–40 layers of WSe2 transistors is systematically investigated with varied temperature from 300 to 5 K. The thickness-dependent transport properties (carrier mobility and Schottky barrier) are discussed. Furthermore, the surface potential of WSe2 as a function of gate voltage is performed under Kelvin probe force microscopy to directly investigate its ambipolar behavior. The results show that the Fermi level will upshift by 100 meV when WSe2 transmits from an insulator to an n-type semiconductor and downshift by 340 meV when WSe2 transmits from an insulator to a p-type semiconductor. Finally, the ambipolar WSe2 transistor-based analog circuit exhibits phase-control by gate voltage in an analog inverter, which demonstrates practical application in 2D communication electronics. Transistors made from two-dimensional tungsten selenide (WSe2) crystals may simplify fabrication of electronic communication devices. Modern transistors amplify and manipulate current by applying electric fields to semiconductor films known as channels that are designed to transport either positive or negative charges. Mingdong Dong from Aarhus University in Denmark and colleagues have developed a new transistor that can move both types of charge. The team found that when individual flakes of WSe2 were stacked into a multi-layered channel structure, the dominant type of charge transported could be switched using an external electrode. A prototype amplifier constructed from two WSe2-based transistors showed this approach enabled fundamental control over analog signals, and could potentially be used in complex circuits that require fewer materials and smaller chip footprints than usual. Compared with unipolar transistors, ambipolar transistors, which can easily switch between n-type and p-type behavior by applying an electric field, are most promising candidates since they can effectively simplify circuit design and save the layout area in CMOS. In this study, we take a deep insight into the thickness dependent physical properties of WSe2, where the optical properties, electric field screening effect, and the ambipolar transport behavior are systematically studied. Furthermore, the investigation of ambipolar WSe2 transistors in analogue circuits exhibiting gate-controlled phase change directly explores its practical application in 2D communication electronics.

Journal ArticleDOI
TL;DR: A highly sensitive pressure sensor based on the semiconductor/conductor interface piezoresistive effect is successfully demonstrated by using organic transistor geometry and shows excellent performance, such as high sensitivity, low limit of detection, short response and recovery time, and robust stability.
Abstract: The piezoresistive pressure sensor, a kind of widely investigated artificial device to transfer force stimuli to electrical signals, generally consists of one or more kinds of conducting materials. Here, a highly sensitive pressure sensor based on the semiconductor/conductor interface piezoresistive effect is successfully demonstrated by using organic transistor geometry. Because of the efficient combination of the piezoresistive effect and field-effect modulation in a single sensor, this pressure sensor shows excellent performance, such as high sensitivity (514 kPa-1 ), low limit of detection, short response and recovery time, and robust stability. More importantly, the unique gate modulation effect in the transistor endows the sensor with an unparalleled ability-tunable sensitivity via bias conditions in a single sensor, which is of great significance for applications in complex pressure environments. The novel working principle and high performance represent significant progress in the field of pressure sensors.

Journal ArticleDOI
06 Jul 2018-Science
TL;DR: In this paper, a single-photon switch and transistor enabled by a solid-state quantum memory is demonstrated, which enables a single 63-picosecond gate photon to switch a signal field containing up to an average of 27.7 photons before the internal state of the device resets.
Abstract: Single-photon switches and transistors generate strong photon-photon interactions that are essential for quantum circuits and networks. However, the deterministic control of an optical signal with a single photon requires strong interactions with a quantum memory, which has been challenging to achieve in a solid-state platform. We demonstrate a single-photon switch and transistor enabled by a solid-state quantum memory. Our device consists of a semiconductor spin qubit strongly coupled to a nanophotonic cavity. The spin qubit enables a single 63-picosecond gate photon to switch a signal field containing up to an average of 27.7 photons before the internal state of the device resets. Our results show that semiconductor nanophotonic devices can produce strong and controlled photon-photon interactions that could enable high-bandwidth photonic quantum information processing.

Journal ArticleDOI
01 Mar 2018
TL;DR: In this article, the authors reviewed the recent advances of developing high electrical properties of metal oxides and their applications in thermoelectric, solar cells, sensors, transistors, and optoelectronic devices.
Abstract: Metal oxides are widely used in many applications such as thermoelectric, solar cells, sensors, transistors, and optoelectronic devices due to their outstanding mechanical, chemical, electrical, and optical properties. For instance, their high Seebeck coefficient, high thermal stability, and earth abundancy make them suitable for thermoelectric power generation, particularly at a high-temperature regime. In this article, we review the recent advances of developing high electrical properties of metal oxides and their applications in thermoelectric, solar cells, sensors, and other optoelectronic devices. The materials examined include both narrow-band-gap (e.g., Na x CoO2, Ca3Co4O9, BiCuSeO, CaMnO3, SrTiO3) and wide-band-gap materials (e.g., ZnO-based, SnO2-based, In2O3-based). Unlike previous review articles, the focus of this study is on identifying an effective doping mechanism of different metal oxides to reach a high power factor. Effective dopants and doping strategies to achieve high carrier concentration and high electrical conductivities are highlighted in this review to enable the advanced applications of metal oxides in thermoelectric power generation and beyond.

Journal ArticleDOI
TL;DR: In this article, the effect of electronic states at insulator-semiconductor interfaces on current linearity of GaN MIS-HEMTs has been discussed and effective surface passivation schemes in conjunction with field-plate structures and emerging device structures utilizing multi-nanochannels under the gate region.