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Title
InsulatedgateandsurfacepassivationstructuresforGaN-basedpowertransistors
Author(s)
Yatabe,Zenji;Asubar,JoelT;Hashizume,Tamotsu
Citation
JournalofPhysicsD:AppliedPhysics,49(39),393001
https://doi.org/10.1088/0022-3727/49/39/393001
IssueDate
2016-09-07
DocURL
http://hdl.handle.net/2115/67317
Rights(URL)
https://creativecommons.org/licenses/by/3.0/
Type
article
FileInformation
JPD-2016.pdf
HokkaidoUniversityCollectionofScholarlyandAcademicPapers:HUSCAP
1 © 2016 IOP Publishing Ltd Printed in the UK
Journal of Physics D: Applied Physics
Insulated gate and surface passivation
structures for GaN-based power transistors
ZenjiYatabe
1
, JoelTAsubar
2
and TamotsuHashizume
3
1
Priority Organization for Innovation and Excellence, Kumamoto University, Kumamoto 860-8555, Japan
2
Graduate School of Engineering, University of Fukui, Fukui 910-8507, Japan
3
Research Center for Integrated Quantum Electronics (RCIQE), Hokkaido University, Sapporo 060-0814, Japan
E-mail:
yatabe@cs.kumamoto-u.ac.jp, joel@u-fukui.ac.jp and hashi@rciqe.hokudai.ac.jp
Received 9 September 2015, revised 16 June 2016
Accepted for publication 21 July 2016
Published 7 September 2016
Abstract
Recent years have witnessed GaN-based devices delivering their promise of unprecedented
power and frequency levels and demonstrating their capability as an able replacement for
Si-based devices. High-electron-mobility transistors (HEMTs), a key representative architecture
of GaN-based devices, are well-suited for high-power and high frequency device applications,
owing to highly desirable III-nitride physical properties. However, these devices are still
hounded by issues not previously encountered in their more established Si- and GaAs-based
devices counterparts. Metal–insulator–semiconductor (MIS) structures are usually employed
with varying degrees of success in sidestepping the major problematic issues such as excessive
leakage current and current instability. While different insulator materials have been applied to
GaN-based transistors, the properties of insulator/III-N interfaces are still not fully understood.
This is mainly due to the difculty of characterizing insulator/AlGaN interfaces in a MIS
HEMT because of the two resulting interfaces: insulator/AlGaN and AlGaN/GaN, making
the potential modulation rather complicated. Although there have been many reports of low
interface-trap densities in HEMT MIS capacitors, several papers have incorrectly evaluated
their capacitance–voltage (C–V) characteristics. A HEMT MIS structure typically shows a
2-step C–V behavior. However, several groups reported C–V curves without the characteristic
step at the forward bias regime, which is likely to the high-density states at the insulator/
AlGaN interface impeding the potential control of the AlGaN surface by the gate bias. In this
review paper, rst we describe critical issues and problems including leakage current, current
collapse and threshold voltage instability in AlGaN/GaN HEMTs. Then we present interface
properties, focusing on interface states, of GaN MIS systems using oxides, nitrides and high-κ
dielectrics. Next, the properties of a variety of AlGaN/GaN MIS structures as well as different
characterization methods, including our own photo-assisted C–V technique, essential for
understanding and developing successful surface passivation and interface control schemes,
are given in the subsequent section. Finally we highlight the important progress in GaN MIS
interfaces that have recently pushed the frontier of nitride-based device technology.
Keywords: AlGaN, GaN, HEMT, MIS structure, C–V, interface state
(Some guresmay appear in colour only in the online journal)
Topical Review
Original content from this work may be used under the terms
of the Creative Commons Attribution 3.0 licence. Any further
distribution of this work must maintain attribution to the author(s) and the title
of the work, journal citation and DOI.
0022-3727/16/393001+19$33.00
doi:10.1088/0022-3727/49/39/393001
J. Phys. D: Appl. Phys. 49 (2016) 393001 (19pp)
Topical Review
2
1. Introduction
GaN-based devices are considered to be the emerging front-
runners to meet the ever growing demand for improved per-
formance in terms of power, operation speed, and efciency
[
1–4]. GaN’s high critical electric eld of over 3 MV cm
−1
,
which is a direct consequence of its wide bandgap of 3.4 eV,
has permitted simultaneous realization of high breakdown
voltages of over 1 kV and low specic on-resistances of about
5 mΩ cm
2
or less [5–15] in GaN-based high-electron mobility
transistors (HEMTs). Using a combination of thick polycrys-
talline AlN passivation, via-holes structures, and eld-plate
schemes, Yanagihara et al have achieved a record off-state
breakdown voltage value of 10.4 kV [16].
Meanwhile, electron saturation velocity as high as 2 ×
10
7
cm s
−1
and high 2D electron gas (2DEG) density of over
1 × 10
13
cm
−2
, originating from spontaneous and piezo-
electric polarization elds as well as from large conduction
band edge offset, make these devices also well-suited for high-
power radio frequency (RF) applications. Downscaling of the
gate length to sub-100 nm regime in conjunction with state-of
the-art technologies has signicantly increased the maximum
current gain cutoff frequency ( f
T
) to over 200 GHz [17, 18].
Recently, Shinohara and co-workers [2, 19] have achieved
ultrahigh-speed operation with record-high f
T
of 454 GHz
with accompanying power gain cutoff frequency ( f
max
) of 444
GHz on a 20 nm gate HEMT. They have developed advanced
technologies including an AlN/GaN/AlGaN double hetero-
structure, a side contact to the 2DEG and regrowth of n
+
-layer
in source/drain region, as shown in gure1. This aggressive
downscaling with a source-drain distance of 130 nm is again
made feasible by the inherently high critical eld of III–V
nitride materials.
However, the very same unique material properties of GaN
also led to some downside effects on device operation. A wide
bandgap naturally leads to a wide variety of deeper traps, giv-
ing rise to the so-called ‘current collapse’. Needless to say, the
very same high critical electric eld of GaN that has allowed
unprecedented high voltage operation, also leads to a higher
degree of charge injection and trapping, inducing more severe
current collapse. Among the different approaches reported
in literature to address the current collapse problem, surface
passivation has become the standard technique because of its
efcacy and simplicity [20, 21].
Another major issue is the ‘normally-on’ nature of GaN-
based HEMTs. For reduced power consumption as well as
failure protection, normally-off operation is highly preferred,
in particular for a power switching devices. Obviously,
normally-off devices requires a positive gate voltage to be
turned on, which leads to exceedingly high leakage current
levels in Schottky-gate devices. For normally-off operation
of transistors, a metal–insulator–semiconductor (MIS) gate
is absolutely necessary. Since the semiconductor/insulator
interfacial quality signicantly affects the transistor perfor-
mance, a chemically stable MIS structure with low inter-
face state densities should be developed for practical device
applications.
A development of a stable MIS gate structure has been
a challenging target in eld-effect-transistors (FETs) using
traditional III–V semiconductors such as GaAs, InP, InGaAs,
etc. Among them, InGaAs MISFETs have gained much attrac-
tion due to their excellent carrier transport properties. In fact,
the electron mobility in this system is more than 10 times
higher than in silicon at a comparable sheet density, making
the integration of the InGaAs MISFET on the Si platform
highly desirable [22–24]. The MIS gate structure requires a
di electric free of trapped charge and other defects, few inter-
facial electronic states and high reliability. However, unlike
Si, there have been no native oxides for III–V semiconduc-
tors that meet these requirements. In addition, various kinds
of insulators/III–V structures prepared by a standard chemi-
cal vapor deposition (CVD) showed poor interface properties
mainly arising from high-density interface states. The atomic
layer deposition (ALD) technique opened the door for man-
ufacturing III–V MOSFETs, because the ALD can provide
relatively high-quality oxides/III–V interfaces. Ye etal [25]
reported epoch-making performance from a GaAs MOSFET
with an ALD Al
2
O
3
gate, showing high g
m
and good RF char-
acteristics. They later demonstrated signicantly improved
device performance on Al
2
O
3
-gate InGaAs MOSFETs with
higher InAs compositions in the InGaAs channel [26].
Furthermore, very high effective channel mobilities over
4000 cm
2
V
−1
s
−1
were reported in ALD Al
2
O
3
-gate InGaAs
MOSFETs [27, 28].
However, instability issues related to I–S interface states
still remain in the InGaAs and GaAs MOSFETs [29]. In this
relation, frequency dispersion at accumulation bias is a com-
monly observed feature in the experimental capacitance–
volt age (C–V) characteristics of MOS structures using GaAs,
InP and InGaAs [30–36], as shown in gure2. To explain
this instability behavior, the border trap (BT) model was
proposed [37]. This model assumes defect levels inside the
gate insulator, as shown in gure3(a). In this case, BTs have
long time constants as they interact with the conduction band
electrons via tunneling, leading to large frequency dispersion
even at accumulation bias [38, 39]. The disorder-induced gap
state (DIGS) model [40, 41], as schematically shown in g-
ure3(b), can well explain frequency dispersion at accumula-
tion bias. In this model, it is assumed that dis ordered region
at the semiconductor surface includes defects, dangling
bonds and lattice displacement (disorder in bond lengths and
angles), thereby producing electronic states with density dis-
tributions in both energy and space. When interface states
have space distribution, electron capture/emission processes
also include tunneling effects. Recently, Galatage etal [36]
reported a comparison of the BT and DIGS models by t-
ting both models to experimental data. Although both models
suggested that frequency dispersion was caused by high-
density electronic states within 0.8 nm from the crystalline
semiconductor surface, they claimed that the exper imental
capacitance frequency dispersion in accumulation can be
well explained by the DIGS model. This led them to conclude
that frequency dispersion is indeed due primarily to disorder
induced gap states in the semiconductor side. Moreover, since
J. Phys. D: Appl. Phys. 49 (2016) 393001
Topical Review
3
the C–V frequency dispersion in InGaAs MOS structures has
been observed for a variety of di electrics including Al
2
O
3
,
HfO
2
, ZrO
2
, LaAlO, HfAlO, etc, it is unlikely that the same
BT would have almost the same energy from the InGaAs con-
duction band edge can be consistently reproduced using dif-
ferent dielectric materials.
To develop a MIS gate applicable to practical devices,
characterization of MIS interface properties have become of
utmost importance for understanding the underlying phys-
ics required for circumventing problematic issues. Although
different insulator materials have been used to GaN-based
transistors including HEMTs, the resulting insulator/III-N
interfacial properties are still not fully understood. This is
partly due to the higher degree of complexity involved in these
structures. In comparison with a conventional MIS structure
having a single semiconductor layer, it is difcult to character-
ize the insulator/AlGaN interfaces in a MIS HEMT because
it has two interfaces: insulator/AlGaN and AlGaN/GaN,
Figure 1. Schematic illustration and cross-sectional image of state-of-the-art GaN HEMT aggressively scaled for high frequency
applications. (Reprinted with permission from [
2], copyright 2013 IEEE.)
Figure 2. C–V characteristics as a function of frequency of (a) HfO
2
and (b) Al
2
O
3
on n-InGaAs. (Reprinted from [36], copyright 2014
with permission from AIP Publishing.)
Figure 3. Schematic illustrations of (a) border trap (BT) model [37]
and (b) disorder-induced gap state (DIGS) model [
40, 41].
J. Phys. D: Appl. Phys. 49 (2016) 393001
Topical Review
4
making the potential modulation rather complicated. In addi-
tion, the emission efciency of electrons from the wide-gap
interface states to the conduction band is very limited at room
temper ature (RT). For example, in the case of AlGaN with an
Al composition of 30% (E
G
~ 4.0 eV), the time constant for
electron emission to the conduction band is estimated to be
in the 10
10
–10
20
s range for near-midgap states at RT [
42]. In
this case, the charge condition of such deeper states cannot be
changed by bias sweeping in a standard C–V measurement.
Although there have been many reports of low interface-trap
densities in HEMT MIS capacitors, several papers may have
incorrectly evaluated their C–V characteristics. A HEMT MIS
structure typically shows a 2-step C–V behavior [42]: one in
the negative gate voltage regime that represents the total series
capacitance of AlGaN and insulator layers, and the other in
the positive gate voltage regime representing only the insula-
tor capacitance. However, several groups reported C–V curves
without the characteristic step at the forward bias regime. This
is likely due to the high-density states at the insulator/AlGaN
interface impeding the control of the gate over the AlGaN sur-
face potential.
Eller etal [43] systematically reviewed surface and inter-
face properties of GaN and AlGaN, including surface elec-
tronic/pinning models, reliability issues, surface treatment
processes and dielectric passivation processes. Roccaforte
etal [44] reported the review on dielectric technologies for
SiC and GaN power devices, e.g. effects of interface states
on channel mobility and stability of threshold voltage in SiC
MOSFETs and improvement of device performance in GaN
MOS HEMTs. In this article, we review insulated gate and
surface passivation technologies for GaN-based MIS transis-
tors including HEMT devices. First, we describe critical issues
and problems including leakage current, current collapse
and threshold voltage instability in AlGaN/GaN HEMTs.
Then we present interface properties, focusing on interface
states, of GaN MIS systems using oxides, nitrides and high-κ
di electrics. Next, the properties of a variety of AlGaN/GaN
MIS structures as well as different characterization methods,
including our own photo-assisted C–V technique, essential
for understanding and developing successful surface passi-
vation and interface control schemes, are given in the subse-
quent section. Finally, we highlight the important progress in
GaN MIS interfaces that have recently pushed the frontier of
nitride-based device technology.
2. Instability issues in GaN-based HEMTs
2.1. Leakage currents in Schottky gates
Although signicant progress has been achieved in GaN-based
high-power/high-frequency electronic devices and ultraviolet
photodetectors, surface-related problems still need an imme-
diate solution. One of these issues is excessive leakage cur-
rent through Schottky gate structures, which not only impedes
device reliability but also degrades power efciency and noise
performance in such devices. In addition, del Alamo and Joh
[
45], Wu etal [46] and Meneghesso and co-workers [47–49]
pointed out a strong correlation between the leakage current
via the Schottky gate edge on the drain side and electrical as
well as structural degradation of AlGaN/GaN HEMTs. They
indicated that a high electric eld at the gate edge under off-
bias condition induces electrically active defects in the AlGaN
barrier due to inverse piezoelectric effect, providing a path for
excess gate current.
To control reliability and degradation issues in Schottky
gate GaN HENTs, we have to clarify the underlying leak-
age mechanism. Yu etal [
50] and Miller et al [51, 52] dis-
cussed the leakage mechanism in GaN and AlGaN Schottky
interfaces on the basis of the eld-emission (FE) tunneling
transport assuming a triangular Schottky potential, as shown
in gure4(a). However, unreasonably higher donor densities
than the actual doping concentration were required in their
calculation for reproduction of the experimental data. Thus,
they speculated that the excessively high leakage current is
due to some other processes such as defect-assisted tunneling
or variable-range-hopping conduction through threading dis-
locations. Other groups also suggested the trap-assisted tun-
neling model (gure 4(b)) to explain the leakage mechanism in
the reverse bias region [
53, 54]. However, such models require
an unlikely multi-step tunneling process or defect continuum
Figure 4. Schematic potential diagrams of (a) eld emission
(FE) and thermionic eld emission processes and (b) trap-assisted
tunneling model [
53, 54]. (c) A patch model with different Schottky
barrier heights [
55].
J. Phys. D: Appl. Phys. 49 (2016) 393001