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A physically based mobility model for numerical simulation of nonplanar devices

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TLDR
A local mobility function, set up in terms of a simple Mattiessen's rule, provides a careful description of MOSFET operation in a wide range of normal (or gate) electric fields.
Abstract
A semiempirical model for carrier mobility in silicon inversion layers is presented. The model, strongly oriented to CAD (computer-aided design) applications, is suitable for two-dimensional numerical simulations of nonplanar devices. A local mobility function, set up in terms of a simple Mattiessen's rule, provides a careful description of MOSFET operation in a wide range of normal (or gate) electric fields, channel impurity concentrations of between 5*10/sup 14/ cm/sup -3/ and 10/sup 17/ cm/sup -3/ for the acceptor density of states and 6*10/sup 14/ cm/sup -3/ and 3*10/sup 17/ cm/sup -3/ for the donor density of states; and temperatures between 200 K and 460 K. Best-fit model parameters are extracted by comparing the calculated drain conductance with a very large set of experimental data points. >

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Dissertation

Top-Gate Nanocrystalline Silicon Thin Film Transistors

Hyun Jung Lee
TL;DR: In this article, the authors present a Table of Table of contents of the paper "Acknowledgements and acknowledgements of the authors of this paper: https://www.goprocessor.org/
Journal ArticleDOI

N-channel MOSFET model for the 60-300-K temperature range

TL;DR: An engineering model of the short-channel NMOS transistor which is applicable to both room-temperature and cryogenic device operation is presented and is a novel method to account for the bulk charge effect in the presence of drift velocity saturation, channel length modulation, charge sharing by the drain and source, and temperature dependence of the critical field.
Journal ArticleDOI

Label Free DNA Detection Techniques Using Dielectric Modulated FET: Inversion or Tunneling?

TL;DR: In this paper, a feasibility estimation of inversion and tunneling based n-type dielectric modulated transistor has been extensively carried out for label free DNA detection and the results show that TFET devices are superior and can replace the existing IMFET with cost effectiveness.
Journal ArticleDOI

Transforming gate misalignment into a unique opportunity to facilitate steep switching in junctionless nanotransistors.

TL;DR: Results show that intentionally misaligned gates in silicon and germanium based JL devices exhibit an inclined conduction channel and achieve a nearly ideal value of steep subthreshold swing (∼ 1 mV decade-1) at room temperature.
References
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Book

Analysis and simulation of semiconductor devices

TL;DR: The history of numerical device modeling can be traced back to the early 1970s as mentioned in this paper, when the basic Semiconductor Equations were defined and the goal of modeling was to identify the most fundamental properties of numerical devices.
Journal ArticleDOI

A review of some charge transport properties of silicon

TL;DR: In this article, the present knowledge of charge transport properties in silicon, with special emphasis on their application in the design of solid-state devices, is reviewed, and most attention is devoted to experimental findings in the temperature range around 300 K and to high-field properties.
Journal ArticleDOI

Self-Consistent Results for n -Type Si Inversion Layers

Frank Stern
- 15 Jun 1972 - 
TL;DR: In this article, self-consistent results for energy levels, populations, and charge distributions are given for $n$-type inversion layers on $p$ -type silicon.
Journal ArticleDOI

Modeling of carrier mobility against carrier concentration in arsenic-, phosphorus-, and boron-doped silicon

TL;DR: In this article, the electron mobility data for both arsenic-and boron-doped silicon are presented in the high doping range, and it is shown that electron mobility is significantly lower in As-and Boron-Doped silicon for carrier concentrations higher than 1019cm-3.
Journal ArticleDOI

Electron mobility in inversion and accumulation layers on thermally oxidized silicon surfaces

TL;DR: In this paper, an extensive set of experimental results on the behavior of electron surface mobility in thermally oxidized silicon structures are presented, which allow the calculation of electron mobility under a wide variety of substrate, process, and electrical conditions.
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