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A physically based mobility model for numerical simulation of nonplanar devices

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TLDR
A local mobility function, set up in terms of a simple Mattiessen's rule, provides a careful description of MOSFET operation in a wide range of normal (or gate) electric fields.
Abstract
A semiempirical model for carrier mobility in silicon inversion layers is presented. The model, strongly oriented to CAD (computer-aided design) applications, is suitable for two-dimensional numerical simulations of nonplanar devices. A local mobility function, set up in terms of a simple Mattiessen's rule, provides a careful description of MOSFET operation in a wide range of normal (or gate) electric fields, channel impurity concentrations of between 5*10/sup 14/ cm/sup -3/ and 10/sup 17/ cm/sup -3/ for the acceptor density of states and 6*10/sup 14/ cm/sup -3/ and 3*10/sup 17/ cm/sup -3/ for the donor density of states; and temperatures between 200 K and 460 K. Best-fit model parameters are extracted by comparing the calculated drain conductance with a very large set of experimental data points. >

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Citations
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Journal ArticleDOI

Exploratory study on power-efficient silicon nano-wire dynamic NMOSFET/PMESFET logic

TL;DR: In this paper, the design and optimisation of surrounding gate n-channel MOSFETs and p-channel mESFET are investigated in dynamic differential domino circuits suitable for an area-efficient technology.
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Establishing Read Operation Bias Schemes for 3-D Pillar Structure Flash Memory Devices to Overcome Paired Cell Interference (PCI)

TL;DR: In this article, the authors investigate the paired cell interference (PCI) which inevitably occurs in the read operation for 3-D memory devices in this feature and examine criteria for setting up the read-operation bias schemes.
Journal ArticleDOI

TRASIM: compact and efficient two-dimensional transient simulator for arbitrary planar semiconductor devices

TL;DR: A new software tool TRASIM (Two-Dimensional Transient Simulator) has been developed for arbitrary, planar semiconductor devices, using a modified, decoupled Gummel-like method for transient simulation.
Journal ArticleDOI

Analysis and performance exploration of high performance (HfO2) SOI FinFETs over the conventional (Si3N4) SOI FinFET towards analog/RF design

TL;DR: In this article, the analog/RF performance study and analysis of high performance device-D2 (conventional HfO2 spacer SOI FinFET) and devices-D3 (source/drain extended HfN4 spacer SINR SOI finFET), over the low-dimensional simulation process through 3D simulation process is explored.
Journal ArticleDOI

Numerical simulation of the pseudo-MOSFET characterization technique

TL;DR: In this article, 2D and 3D numerical simulations of the Ψ-MOSFET are performed in order to validate the basic principles and uncover several less obvious aspects: evaluation of the geometrical factor, distribution of the current lines, influence of the sample size and borders proximity.
References
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Book

Analysis and simulation of semiconductor devices

TL;DR: The history of numerical device modeling can be traced back to the early 1970s as mentioned in this paper, when the basic Semiconductor Equations were defined and the goal of modeling was to identify the most fundamental properties of numerical devices.
Journal ArticleDOI

A review of some charge transport properties of silicon

TL;DR: In this article, the present knowledge of charge transport properties in silicon, with special emphasis on their application in the design of solid-state devices, is reviewed, and most attention is devoted to experimental findings in the temperature range around 300 K and to high-field properties.
Journal ArticleDOI

Self-Consistent Results for n -Type Si Inversion Layers

Frank Stern
- 15 Jun 1972 - 
TL;DR: In this article, self-consistent results for energy levels, populations, and charge distributions are given for $n$-type inversion layers on $p$ -type silicon.
Journal ArticleDOI

Modeling of carrier mobility against carrier concentration in arsenic-, phosphorus-, and boron-doped silicon

TL;DR: In this article, the electron mobility data for both arsenic-and boron-doped silicon are presented in the high doping range, and it is shown that electron mobility is significantly lower in As-and Boron-Doped silicon for carrier concentrations higher than 1019cm-3.
Journal ArticleDOI

Electron mobility in inversion and accumulation layers on thermally oxidized silicon surfaces

TL;DR: In this paper, an extensive set of experimental results on the behavior of electron surface mobility in thermally oxidized silicon structures are presented, which allow the calculation of electron mobility under a wide variety of substrate, process, and electrical conditions.
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