Journal ArticleDOI
A physically based mobility model for numerical simulation of nonplanar devices
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TLDR
A local mobility function, set up in terms of a simple Mattiessen's rule, provides a careful description of MOSFET operation in a wide range of normal (or gate) electric fields.Abstract:
A semiempirical model for carrier mobility in silicon inversion layers is presented. The model, strongly oriented to CAD (computer-aided design) applications, is suitable for two-dimensional numerical simulations of nonplanar devices. A local mobility function, set up in terms of a simple Mattiessen's rule, provides a careful description of MOSFET operation in a wide range of normal (or gate) electric fields, channel impurity concentrations of between 5*10/sup 14/ cm/sup -3/ and 10/sup 17/ cm/sup -3/ for the acceptor density of states and 6*10/sup 14/ cm/sup -3/ and 3*10/sup 17/ cm/sup -3/ for the donor density of states; and temperatures between 200 K and 460 K. Best-fit model parameters are extracted by comparing the calculated drain conductance with a very large set of experimental data points. >read more
Citations
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Journal ArticleDOI
Performance evaluation of nanoscale halo dual-material double gate SiGe MOSFET using 2-D numerical simulation
TL;DR: In this article, the performance analysis of a double-gate MOSFET with a SiGe channel is presented, and the influence of introducing some structural modifications at the level of the device is shown.
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Transient Monte Carlo simulations for the optimisation and characterisation of monolithic silicon sensors
Rafael Ballabriga,J. Braach,E. Buschmann,M. Campbell,Dominik Dannheim,K. Dort,L. Huth,Iraklis Kremastiotis,J. Kröger,L. Linssen,M. Munker,P. Schütze,W. Snoeys,Simon Spannagel,Tomas Vanat +14 more
TL;DR: In this paper , a combination of electrostatic finite element simulations using 3D TCAD and transient Monte Carlo simulations with the Allpix Squared framework is presented for a monolithic CMOS pixel sensor with a small collection diode, that is characterised by a highly inhomogeneous, complex electric field.
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Simulation Study of the Instability Induced by the Variation of Grain Boundary Width and Trap Density in Gate-All-Around Polysilicon Transistor
TL;DR: In this article, a macaroni type gate-all-around polysilicon transistor with a single grain boundary (GB) is simulated to elucidate the impacts of the variation of GB width and trap density on its transfer characteristics.
Journal ArticleDOI
On the assessment of various implants using 3D TCAD for FinFETs
TL;DR: This work deals with the junction and channel optimization on FinFET devices to show feasibility of a three-dimensional (3D) process simulation within the context of optimization of the device design and the underlying fabrication processes.
Proceedings ArticleDOI
A modular high temperature measurement set-up for semiconductor device characterization
Peter Borthen,Gerhard Wachutka +1 more
TL;DR: In this article, the capabilities of a high temperature measurement set-up recently developed at the University of Sheffield have been demonstrated by measuring temperature-dependent characteristics of silicon VDMOSFET and IGBT devices as well as SiC-diodes.
References
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Book
Analysis and simulation of semiconductor devices
TL;DR: The history of numerical device modeling can be traced back to the early 1970s as mentioned in this paper, when the basic Semiconductor Equations were defined and the goal of modeling was to identify the most fundamental properties of numerical devices.
Journal ArticleDOI
A review of some charge transport properties of silicon
TL;DR: In this article, the present knowledge of charge transport properties in silicon, with special emphasis on their application in the design of solid-state devices, is reviewed, and most attention is devoted to experimental findings in the temperature range around 300 K and to high-field properties.
Journal ArticleDOI
Self-Consistent Results for n -Type Si Inversion Layers
TL;DR: In this article, self-consistent results for energy levels, populations, and charge distributions are given for $n$-type inversion layers on $p$ -type silicon.
Journal ArticleDOI
Modeling of carrier mobility against carrier concentration in arsenic-, phosphorus-, and boron-doped silicon
Guido Masetti,M. Severi,S. Solmi +2 more
TL;DR: In this article, the electron mobility data for both arsenic-and boron-doped silicon are presented in the high doping range, and it is shown that electron mobility is significantly lower in As-and Boron-Doped silicon for carrier concentrations higher than 1019cm-3.
Journal ArticleDOI
Electron mobility in inversion and accumulation layers on thermally oxidized silicon surfaces
S.C. Sun,James D. Plummer +1 more
TL;DR: In this paper, an extensive set of experimental results on the behavior of electron surface mobility in thermally oxidized silicon structures are presented, which allow the calculation of electron mobility under a wide variety of substrate, process, and electrical conditions.
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