Journal ArticleDOI
A physically based mobility model for numerical simulation of nonplanar devices
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TLDR
A local mobility function, set up in terms of a simple Mattiessen's rule, provides a careful description of MOSFET operation in a wide range of normal (or gate) electric fields.Abstract:
A semiempirical model for carrier mobility in silicon inversion layers is presented. The model, strongly oriented to CAD (computer-aided design) applications, is suitable for two-dimensional numerical simulations of nonplanar devices. A local mobility function, set up in terms of a simple Mattiessen's rule, provides a careful description of MOSFET operation in a wide range of normal (or gate) electric fields, channel impurity concentrations of between 5*10/sup 14/ cm/sup -3/ and 10/sup 17/ cm/sup -3/ for the acceptor density of states and 6*10/sup 14/ cm/sup -3/ and 3*10/sup 17/ cm/sup -3/ for the donor density of states; and temperatures between 200 K and 460 K. Best-fit model parameters are extracted by comparing the calculated drain conductance with a very large set of experimental data points. >read more
Citations
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Journal ArticleDOI
A total resistance slope-based effective channel mobility extraction method for deep submicrometer CMOS technology
TL;DR: In this article, a simple total resistance slope-based method for channel mobility extraction in deep submicrometer CMOS technology is developed, where the series resistance is removed from the measured total resistance, and mobility is extracted without involving the effective channel length.
Journal ArticleDOI
A physically-based model of the effective mobility in heavily-doped n-MOSFETs
TL;DR: In this paper, the authors present a new analytical mobility model for channel electrons in heavily-doped MOSFETs biased from weak to strong inversion suitable for implementation in device simulation codes.
Journal ArticleDOI
Electron-Scattering Mechanisms in Heavily Doped Silicon Carbide MOSFET Inversion Layers
TL;DR: In this paper, the main scattering mechanisms limiting electron mobility in SiC MOSFETs were determined as a function of gate bias and body bias, and Coulomb scattering and surface roughness was found to be dominant at higher sheet densities.
Journal ArticleDOI
Ultra Low Power Junctionless MOSFETs for Subthreshold Logic Applications
TL;DR: In this article, the potential of junctionless (JL) MOS transistors for ultra low power (ULP) subthreshold logic applications was reported, which showed that double gate (DG) JL devices, which do not require source or drain extension region engineering, can perform significantly better than conventional inversion mode devices, and comparable with underlap DG MOSFETs for ULP applications.
Journal ArticleDOI
Device Modeling at Cryogenic Temperatures: Effects of Incomplete Ionization
TL;DR: In this paper, the authors present a device performance modeling methodology that self-consistently resolves device operation at cryogenic temperatures (T > 30 K) in conjunction with incomplete ionization effects that take into account the change in dopant activation energies as a function of doping.
References
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Book
Analysis and simulation of semiconductor devices
TL;DR: The history of numerical device modeling can be traced back to the early 1970s as mentioned in this paper, when the basic Semiconductor Equations were defined and the goal of modeling was to identify the most fundamental properties of numerical devices.
Journal ArticleDOI
A review of some charge transport properties of silicon
TL;DR: In this article, the present knowledge of charge transport properties in silicon, with special emphasis on their application in the design of solid-state devices, is reviewed, and most attention is devoted to experimental findings in the temperature range around 300 K and to high-field properties.
Journal ArticleDOI
Self-Consistent Results for n -Type Si Inversion Layers
TL;DR: In this article, self-consistent results for energy levels, populations, and charge distributions are given for $n$-type inversion layers on $p$ -type silicon.
Journal ArticleDOI
Modeling of carrier mobility against carrier concentration in arsenic-, phosphorus-, and boron-doped silicon
Guido Masetti,M. Severi,S. Solmi +2 more
TL;DR: In this article, the electron mobility data for both arsenic-and boron-doped silicon are presented in the high doping range, and it is shown that electron mobility is significantly lower in As-and Boron-Doped silicon for carrier concentrations higher than 1019cm-3.
Journal ArticleDOI
Electron mobility in inversion and accumulation layers on thermally oxidized silicon surfaces
S.C. Sun,James D. Plummer +1 more
TL;DR: In this paper, an extensive set of experimental results on the behavior of electron surface mobility in thermally oxidized silicon structures are presented, which allow the calculation of electron mobility under a wide variety of substrate, process, and electrical conditions.
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