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A physically based mobility model for numerical simulation of nonplanar devices

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TLDR
A local mobility function, set up in terms of a simple Mattiessen's rule, provides a careful description of MOSFET operation in a wide range of normal (or gate) electric fields.
Abstract
A semiempirical model for carrier mobility in silicon inversion layers is presented. The model, strongly oriented to CAD (computer-aided design) applications, is suitable for two-dimensional numerical simulations of nonplanar devices. A local mobility function, set up in terms of a simple Mattiessen's rule, provides a careful description of MOSFET operation in a wide range of normal (or gate) electric fields, channel impurity concentrations of between 5*10/sup 14/ cm/sup -3/ and 10/sup 17/ cm/sup -3/ for the acceptor density of states and 6*10/sup 14/ cm/sup -3/ and 3*10/sup 17/ cm/sup -3/ for the donor density of states; and temperatures between 200 K and 460 K. Best-fit model parameters are extracted by comparing the calculated drain conductance with a very large set of experimental data points. >

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Citations
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Journal ArticleDOI

Performance optimization for the sub-22 nm fully depleted SOI nanowire transistors

TL;DR: In this paper, a design methodology of silicon nanowire MOSFETs is presented, and an analytical gate capacitance model for sub-22nm gate length is proposed to gain insight into design optimization with quantum confinement.
Journal ArticleDOI

ZTC bias point of advanced fin based device: The importance and exploration

TL;DR: In this article, the sensitivity of geometry parameters on assorted performances of Fin-based device and its reliability over ample range of temperatures i.e. 25 0 C to 225 0 C is reviewed to extend the benchmark of device scalability.

DPA Resistance of Cryptographic Circuits Considering Temperature and Process Variations

TL;DR: The effect of temperature and process variations on the ease of Differential Power Attacks on SPICE implementations of two cryptographic algorithms, namely KEELOQ and a single S-BOX of DES is explored.
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Self-Aligned and Non-Self-Aligned Contact Metallization in InGaAs Metal–Oxide-Semiconductor Field-Effect Transistors: A Simulation Study

TL;DR: In this article, the authors compared self-aligned contact metallization with non-self-aligned contacts in In0.53Ga0.47As MOSFETs to determine the importance of selfaligned contacts at advanced technology nodes.
Journal ArticleDOI

Interlayer coupling effect on the performance of monolithic three-dimensional inverters and its dependence on the interlayer dielectric thickness

TL;DR: In this paper, the interlayer coupling in monolithic three-dimensional (3D) inverters is investigated and its effect on the performance of 3D inverters using technology computer-aided design simulation.
References
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Book

Analysis and simulation of semiconductor devices

TL;DR: The history of numerical device modeling can be traced back to the early 1970s as mentioned in this paper, when the basic Semiconductor Equations were defined and the goal of modeling was to identify the most fundamental properties of numerical devices.
Journal ArticleDOI

A review of some charge transport properties of silicon

TL;DR: In this article, the present knowledge of charge transport properties in silicon, with special emphasis on their application in the design of solid-state devices, is reviewed, and most attention is devoted to experimental findings in the temperature range around 300 K and to high-field properties.
Journal ArticleDOI

Self-Consistent Results for n -Type Si Inversion Layers

Frank Stern
- 15 Jun 1972 - 
TL;DR: In this article, self-consistent results for energy levels, populations, and charge distributions are given for $n$-type inversion layers on $p$ -type silicon.
Journal ArticleDOI

Modeling of carrier mobility against carrier concentration in arsenic-, phosphorus-, and boron-doped silicon

TL;DR: In this article, the electron mobility data for both arsenic-and boron-doped silicon are presented in the high doping range, and it is shown that electron mobility is significantly lower in As-and Boron-Doped silicon for carrier concentrations higher than 1019cm-3.
Journal ArticleDOI

Electron mobility in inversion and accumulation layers on thermally oxidized silicon surfaces

TL;DR: In this paper, an extensive set of experimental results on the behavior of electron surface mobility in thermally oxidized silicon structures are presented, which allow the calculation of electron mobility under a wide variety of substrate, process, and electrical conditions.
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