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Journal ArticleDOI

A physically based mobility model for numerical simulation of nonplanar devices

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TLDR
A local mobility function, set up in terms of a simple Mattiessen's rule, provides a careful description of MOSFET operation in a wide range of normal (or gate) electric fields.
Abstract
A semiempirical model for carrier mobility in silicon inversion layers is presented. The model, strongly oriented to CAD (computer-aided design) applications, is suitable for two-dimensional numerical simulations of nonplanar devices. A local mobility function, set up in terms of a simple Mattiessen's rule, provides a careful description of MOSFET operation in a wide range of normal (or gate) electric fields, channel impurity concentrations of between 5*10/sup 14/ cm/sup -3/ and 10/sup 17/ cm/sup -3/ for the acceptor density of states and 6*10/sup 14/ cm/sup -3/ and 3*10/sup 17/ cm/sup -3/ for the donor density of states; and temperatures between 200 K and 460 K. Best-fit model parameters are extracted by comparing the calculated drain conductance with a very large set of experimental data points. >

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Citations
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Proceedings ArticleDOI

Effect of channel engineering on analog/RF performance of underlapped gatestack DG-MOSFET in Sub-20nm regime

TL;DR: It has been observed that the graded channel with heavily doped source side offers significant improvement in analog performance such as on-current, transconductance, intrinsic gain and in RF performance like cut-off frequency, maximum frequency of oscillation.
Dissertation

Performance and robustness characterisation of SiC power MOSFETs

Asad Fayyaz
TL;DR: In this article, the authors focus on device characterisation of state-of-the-art SiC power MOSFETs from different manufacturers during short circuit and avalanche breakdown operation modes under a wide range of operating conditions.
Journal ArticleDOI

Sub-circuit models of silicon-on-insulator insulated-gate pn-junction devices for electrostatic discharge protection circuit design and their applications

TL;DR: In this article, equivalent circuit models of silicon-on-insulator (SOI) insulated gate pn-junction devices for circuit simulations are proposed using a device simulator.
Journal ArticleDOI

Dominant scattering mechanism in SiC MOSFET: comparative study of the universal mobility and the theoretically calculated channel mobility

TL;DR: In this paper, the universal mobility of SiC MOSFETs with sufficiently reduced Coulomb scattering centers is investigated and compared with the theoretically calculated channel mobility, and it is quantitatively shown that η, which determines effective electric fields Eeff (=q(Ndpl + η Ns)/es), should be set to 0.26 to express the mobility universally.
Journal ArticleDOI

Occurrence of zero gate oxide thickness coefficient in junctionless transistors

TL;DR: In this paper, it was shown that drain current increases with an increase in oxide thickness up to a certain gate voltage, whereas beyond (VZToxC), current follows the conventional transistor theory and reduces with an increment in gate oxide thickness.
References
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Book

Analysis and simulation of semiconductor devices

TL;DR: The history of numerical device modeling can be traced back to the early 1970s as mentioned in this paper, when the basic Semiconductor Equations were defined and the goal of modeling was to identify the most fundamental properties of numerical devices.
Journal ArticleDOI

A review of some charge transport properties of silicon

TL;DR: In this article, the present knowledge of charge transport properties in silicon, with special emphasis on their application in the design of solid-state devices, is reviewed, and most attention is devoted to experimental findings in the temperature range around 300 K and to high-field properties.
Journal ArticleDOI

Self-Consistent Results for n -Type Si Inversion Layers

Frank Stern
- 15 Jun 1972 - 
TL;DR: In this article, self-consistent results for energy levels, populations, and charge distributions are given for $n$-type inversion layers on $p$ -type silicon.
Journal ArticleDOI

Modeling of carrier mobility against carrier concentration in arsenic-, phosphorus-, and boron-doped silicon

TL;DR: In this article, the electron mobility data for both arsenic-and boron-doped silicon are presented in the high doping range, and it is shown that electron mobility is significantly lower in As-and Boron-Doped silicon for carrier concentrations higher than 1019cm-3.
Journal ArticleDOI

Electron mobility in inversion and accumulation layers on thermally oxidized silicon surfaces

TL;DR: In this paper, an extensive set of experimental results on the behavior of electron surface mobility in thermally oxidized silicon structures are presented, which allow the calculation of electron mobility under a wide variety of substrate, process, and electrical conditions.
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