Journal ArticleDOI
A physically based mobility model for numerical simulation of nonplanar devices
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TLDR
A local mobility function, set up in terms of a simple Mattiessen's rule, provides a careful description of MOSFET operation in a wide range of normal (or gate) electric fields.Abstract:
A semiempirical model for carrier mobility in silicon inversion layers is presented. The model, strongly oriented to CAD (computer-aided design) applications, is suitable for two-dimensional numerical simulations of nonplanar devices. A local mobility function, set up in terms of a simple Mattiessen's rule, provides a careful description of MOSFET operation in a wide range of normal (or gate) electric fields, channel impurity concentrations of between 5*10/sup 14/ cm/sup -3/ and 10/sup 17/ cm/sup -3/ for the acceptor density of states and 6*10/sup 14/ cm/sup -3/ and 3*10/sup 17/ cm/sup -3/ for the donor density of states; and temperatures between 200 K and 460 K. Best-fit model parameters are extracted by comparing the calculated drain conductance with a very large set of experimental data points. >read more
Citations
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Journal ArticleDOI
A Novel GaN Metal-Insulator-Semiconductor High Electron Mobility Transistor Featuring Vertical Gate Structure.
TL;DR: A novel structure scheme by transposing the gate channel orientation from a long horizontal one to a short vertical one is proposed and verified by technology computer-aided design (TCAD) simulations to achieve GaN-based normally-off high electron mobility transistors (HEMTs) with reduced on-resistance and improved threshold voltage.
Dissertation
Simulation tool development for semiconductor devices based on drift-diffusion and Monte Carlo
Reyes Aspé,Francisco Esteban +1 more
Proceedings ArticleDOI
TCAD Modeling for next generation CMOS devices
TL;DR: In this article, the authors review the different aspects of the TCAD needed for the 3D Tri-gate devices and present a 3D Monte Carlo simulation for the transport modeling.
Journal ArticleDOI
Impact of (Quasi-)Ballistic Transport on Operation of Complementary Metal–Oxide–Semiconductor Inverters Based on Fully-Depleted Silicon-on-Insulator and Nanowire Devices
Sebastien Martinie,Daniela Munteanu,Gilles Le Carval,J. Dura,Marie-Anne Jaud,Sylvain Barraud,Jean-Luc Autran +6 more
TL;DR: In this article, the authors have developed a numerical simulation methodology to analyze the impact of both device architecture and transport properties on static circuit performance, and they have used their approach to simulate two ultimate architectures: fully-depleted (FD) silicon-on-insulator (SOI) metal-oxide-semiconductor field effect transistor (MOSFET) and nanowire MOSFLT.
Journal ArticleDOI
Minimization of gate-induced drain leakage by controlling gate underlap length for low-standby-power operation of 20-nm-level four-terminal silicon-on-insulator fin-shaped field effect transistor
Seongjae Cho,Shin-ichi O'uchi,Kazuhiko Endo,Takashi Matsukawa,Kunihiro Sakamoto,Yongxun Liu,Byung-Gook Park,Meishoku Masahara +7 more
TL;DR: In this paper, the appropriate underlap length range for the effective minimization of gate-induced drain leakage in 20-nm-level four-terminal (4-T) fin-shaped FET on silicon-on-insulator (SOI) is established.
References
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Book
Analysis and simulation of semiconductor devices
TL;DR: The history of numerical device modeling can be traced back to the early 1970s as mentioned in this paper, when the basic Semiconductor Equations were defined and the goal of modeling was to identify the most fundamental properties of numerical devices.
Journal ArticleDOI
A review of some charge transport properties of silicon
TL;DR: In this article, the present knowledge of charge transport properties in silicon, with special emphasis on their application in the design of solid-state devices, is reviewed, and most attention is devoted to experimental findings in the temperature range around 300 K and to high-field properties.
Journal ArticleDOI
Self-Consistent Results for n -Type Si Inversion Layers
TL;DR: In this article, self-consistent results for energy levels, populations, and charge distributions are given for $n$-type inversion layers on $p$ -type silicon.
Journal ArticleDOI
Modeling of carrier mobility against carrier concentration in arsenic-, phosphorus-, and boron-doped silicon
Guido Masetti,M. Severi,S. Solmi +2 more
TL;DR: In this article, the electron mobility data for both arsenic-and boron-doped silicon are presented in the high doping range, and it is shown that electron mobility is significantly lower in As-and Boron-Doped silicon for carrier concentrations higher than 1019cm-3.
Journal ArticleDOI
Electron mobility in inversion and accumulation layers on thermally oxidized silicon surfaces
S.C. Sun,James D. Plummer +1 more
TL;DR: In this paper, an extensive set of experimental results on the behavior of electron surface mobility in thermally oxidized silicon structures are presented, which allow the calculation of electron mobility under a wide variety of substrate, process, and electrical conditions.
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