Journal ArticleDOI
A physically based mobility model for numerical simulation of nonplanar devices
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TLDR
A local mobility function, set up in terms of a simple Mattiessen's rule, provides a careful description of MOSFET operation in a wide range of normal (or gate) electric fields.Abstract:
A semiempirical model for carrier mobility in silicon inversion layers is presented. The model, strongly oriented to CAD (computer-aided design) applications, is suitable for two-dimensional numerical simulations of nonplanar devices. A local mobility function, set up in terms of a simple Mattiessen's rule, provides a careful description of MOSFET operation in a wide range of normal (or gate) electric fields, channel impurity concentrations of between 5*10/sup 14/ cm/sup -3/ and 10/sup 17/ cm/sup -3/ for the acceptor density of states and 6*10/sup 14/ cm/sup -3/ and 3*10/sup 17/ cm/sup -3/ for the donor density of states; and temperatures between 200 K and 460 K. Best-fit model parameters are extracted by comparing the calculated drain conductance with a very large set of experimental data points. >read more
Citations
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Proceedings ArticleDOI
Electron mobility modeling in strained-Si n-MOSFETs using TCAD
TL;DR: In this article, the electron mobility in the strained Si channel has been modelled analytically and simulated for a long channel device using TCAD tool and the same model has been implemented for a short channel device to investigate the device characteristics.
Journal ArticleDOI
Effect of surface roughness of trench sidewalls on electrical properties in 4H-SiC trench MOSFETs
Katsuhiro Kutsuki,Murakami Yuki,Yukihiko Watanabe,Toru Onishi,Kensaku Yamamoto,Hirokazu Fujiwara,Takahiro Ito +6 more
TL;DR: In this article, the effects of the surface roughness of trench sidewalls on electrical properties have been investigated in 4H-SiC trench MOSFETs by atomic force microscopy.
Journal ArticleDOI
Three-dimensional modeling of the erasing operation in a submicron flash-EEPROM memory cell
TL;DR: This paper addresses the modeling of the erasing operation in a realistic flash-EEPROM cell, based on a three-dimensional device-simulation code in which models for higher-order physical effects have been incorporated, specifically, the Fowler-Nordheim (FN) and the band-to-band tunneling.
Journal ArticleDOI
Future challenges in CMOS process modeling
Peter Pichler,Peter Pichler,Alexander Burenkov,Jurgen Lorenz,C. Kampen,Lothar Frey,Lothar Frey +6 more
TL;DR: In this paper, the requirements on simulation of doping profiles are explained based on simulations of the electrical behavior of ultra-thin body silicon-on-insulator devices and FinFET architectures, the main emphasis changed to activation and lateral diffusion.
Journal ArticleDOI
Development of an analytical mobility model for the simulation of ultra-thin single- and double-gate SOI MOSFETs
TL;DR: In this article, an analytical model for the electron mobility limited by surface optical phonons is developed and applied to the simulation of ultra-thin SOI MOSFETs, which has been implemented in a conventional device simulator.
References
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Book
Analysis and simulation of semiconductor devices
TL;DR: The history of numerical device modeling can be traced back to the early 1970s as mentioned in this paper, when the basic Semiconductor Equations were defined and the goal of modeling was to identify the most fundamental properties of numerical devices.
Journal ArticleDOI
A review of some charge transport properties of silicon
TL;DR: In this article, the present knowledge of charge transport properties in silicon, with special emphasis on their application in the design of solid-state devices, is reviewed, and most attention is devoted to experimental findings in the temperature range around 300 K and to high-field properties.
Journal ArticleDOI
Self-Consistent Results for n -Type Si Inversion Layers
TL;DR: In this article, self-consistent results for energy levels, populations, and charge distributions are given for $n$-type inversion layers on $p$ -type silicon.
Journal ArticleDOI
Modeling of carrier mobility against carrier concentration in arsenic-, phosphorus-, and boron-doped silicon
Guido Masetti,M. Severi,S. Solmi +2 more
TL;DR: In this article, the electron mobility data for both arsenic-and boron-doped silicon are presented in the high doping range, and it is shown that electron mobility is significantly lower in As-and Boron-Doped silicon for carrier concentrations higher than 1019cm-3.
Journal ArticleDOI
Electron mobility in inversion and accumulation layers on thermally oxidized silicon surfaces
S.C. Sun,James D. Plummer +1 more
TL;DR: In this paper, an extensive set of experimental results on the behavior of electron surface mobility in thermally oxidized silicon structures are presented, which allow the calculation of electron mobility under a wide variety of substrate, process, and electrical conditions.
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