Proceedings ArticleDOI
Garp: a MIPS processor with a reconfigurable coprocessor
Jay Hauser,John Wawrzynek +1 more
- pp 12-21
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TLDR
Novel aspects of the Garp Architecture are presented, as well as a prototype software environment and preliminary performance results, which suggest that a Garp of similar technology could achieve speedups ranging from a factor of 2 to as high as a factors of 24 for some useful applications.Abstract:
Typical reconfigurable machines exhibit shortcomings that make them less than ideal for general-purpose computing. The Garp Architecture combines reconfigurable hardware with a standard MIPS processor on the same die to retain the better features of both. Novel aspects of the architecture are presented, as well as a prototype software environment and preliminary performance results. Compared to an UltraSPARC, a Garp of similar technology could achieve speedups ranging from a factor of 2 to as high as a factor of 24 for some useful applications.read more
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Book ChapterDOI
Design space exploration for configurable architectures and the role of modeling, high-level program analysis and learning techniques
TL;DR: A unified approach for this DSE challenge is described in which program analysis, estimation, modeling and empirical optimization techniques can be complemented with history- and learning-based approaches.
Proceedings ArticleDOI
ZONA — An adaptable NoC-based multiprocessor addressed to education on system-on-chip design
TL;DR: A didactic architecture for a NoC-based multiprocessor system-on-chip using a Reconfigurable Instruction Set Processor (RISP) as homogeneous processing element is proposed and an assembler tool is written to make simpler the development of MP-SoC applications.
Journal ArticleDOI
Dynamic acceleration management for SystemC emulation
TL;DR: This work utilizes dynamic online algorithms to manage the use of a limited number of SystemC acceleration engines in an emulation framework, where the kernel must adapt and react to a dynamically changing event queue.
Dissertation
Design of self-tuning reliable embedded systems and its application in railway transportation systems
TL;DR: In this article, the authors proposed a cross-layer model of circuits vulnerability based on a combined modeling of Transistor Level (TLM) and System Level Masking (SLM) mechanisms.
Book ChapterDOI
Reconfigurable Computing Architectures
TL;DR: This chapter explores different design choices made for reconfigurable computing architectures and how these choices affect both operation and performance and discusses the questions such as whether the reconfiguring fabric be instantiated as a separate coprocessor or integrated as a functional unit.
References
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Book
Applied Cryptography: Protocols, Algorithms, and Source Code in C
Bruce Schneier,Phil Sutherland +1 more
TL;DR: This document describes the construction of protocols and their use in the real world, as well as some examples of protocols used in the virtual world.
Proceedings ArticleDOI
A high-performance microarchitecture with hardware-programmable functional units
Rahul Razdan,Michael D. Smith +1 more
TL;DR: A novel way to incorporate hardware-programmable resources into a processor microarchitecture to improve the performance of general-purpose applications through a coupling of compile-time analysis routines and hardware synthesis tools is explored.
Dissertation
Reconfigurable Architectures for General-Purpose Computing
André DeHon,Thomas F. Knight +1 more
TL;DR: MATRIX is developed, the first architecture to defer the binding of instruction resources until run-time, allowing the application to organize resources according to its needs, and it is shown that MATRIX yields 10-20$\times the computational density of conventional processors.
Journal ArticleDOI
Processor reconfiguration through instruction-set metamorphosis
TL;DR: The processor reconfiguration through instruction-set metamorphosis (PRISM) general-purpose architecture, which speeds up computationally intensive tasks by augmenting the core processor's functionality with new operations, is described.
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