Journal ArticleDOI
A Regular Layout for Parallel Adders
TLDR
It is shown that addition of n-bit binary numbers can be performed on a chip with a regular layout in time proportional to log n and with area proportional to n.Abstract:
With VLSI architecture, the chip area and design regularity represent a better measure of cost than the conventional gate count. We show that addition of n-bit binary numbers can be performed on a chip with a regular layout in time proportional to log n and with area proportional to n.read more
Citations
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Journal ArticleDOI
Low Power Parallel Prefix Adder
TL;DR: This work focuses on designing 8-bit prefix adders such as Brent Kung, Kogge Stone and Sklansky adders using GDI technique and the performance of these GDI based prefix adder are compared with that of CMOS based prefixAdder.
Design and implementation of high speed parallel prefix ling adder
TL;DR: A novel framework is introduced, which allows the design of parallel-prefix Ling adders that saves one-logic level of implementation compared to the parallel- prefix structures proposed for the traditional definition of carry look ahead equations and reduces the fan out requirements of the design.
Aspects of algorithms and complexity
TL;DR: The cover illustration is a graphical depiction of the game-theoretical value of all up-to-4-ply positions in the game of connect-4, and represents positions resulting from a move in one of the seven columns of the board.
Proceedings ArticleDOI
Parallel Prefix Network Based DQPSK Precoder for High-Speed Optical Transmission
TL;DR: The principle of parallel prefix network (PPN) is introduced and the feasibility of applying PPN to differential quadrature phase-shift keying (DQPSK) precoder is proved.
Journal ArticleDOI
Adding Flexibility to Hybrid Number Systems
TL;DR: This paper shows that adding flexibility to hybrid systems is very simple, and a general procedure is proposed whose complexity is the same as the well-known mixed radix converting algorithm.
References
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Book
Computer Architecture: A Quantitative Approach
TL;DR: This best-selling title, considered for over a decade to be essential reading for every serious student and practitioner of computer design, has been updated throughout to address the most important trends facing computer designers today.
Journal ArticleDOI
Parallel Prefix Computation
TL;DR: A recurstve construction is used to obtain a product circuit for solving the prefix problem and a Boolean clrcmt which has depth 2[Iog2n] + 2 and size bounded by 14n is obtained for n-bit binary addmon.